AD7779 datasheet(13/97 Pages) AD

13 / 97 page

Data Sheet

AD7779

Rev. 0 | Page 13 of 97

ABSOLUTE MAXIMUM RATINGS

Table 7.

Parameter

Rating

Any Supply Pin to AVSSx

−0.3 V to +3.96 V

AVSSx to DGND

−1.98 V to +0.3 V

AREGxCAP to AVSSx

−0.3 V to +1.98 V

DREGCAP to DGND

−0.3 V to +1.98 V

IOVDD to DGND

−0.3 V to +3.96 V

IOVDD to AVSSx

−0.3 V to +5.94 V

AVDD4 to AVSSx

AVDD1x − 0.3 V to 3.96 V

Analog Input Voltage

AVSSx − 0.3 V to AVDD1x + 0.3 V or

3.96 V (whichever is less)

REFx± Input Voltage

AVSSx − 0.3 V to AVDD1x + 0.3 V or

3.96 V (whichever is less)

AUXAIN±

AVSSx − 0.3 V to AVDD4 + 0.1 V or

3.96V (whichever is less)

Digital Input Voltage to

DGND

DGND − 0.3 V to IOVDD + 0.3 V or

3.96 V (whichever is less)

Digital Output Voltage to

DGND

DGND − 0.3 V to IOVDD + 0.3 V or

3.96 V (whichever is less)

XTAL1 to DGND

DGND − 0.3 V to DREGCAP + 0.3 V

or 1.98 V (whichever is less)

AINx±, AUXAIN±, and

Digital Input Current

±10 mA

Operating Temperature

Range

−40°C to +125°C

Junction Temperature,

TJ Maximum

150°C

Storage Temperature Range

−65°C to +150°C

Reflow Soldering

260°C

ESD

2 kV

Field Induced Charged

Device Model (FICDM)

500 V

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

THERMAL RESISTANCE

Thermal performance is directly linked to printed circuit board

(PCB) design and operating environment. Close attention to

PCB thermal design is required.

Table 8. Thermal Resistance

Package Type1

θJA

θJB

ΨJT

ΨJB

Unit

64-Lead LFCSP

No Thermal Vias1

30.43

N/A2

0.13

6.59

°C/W

49 Thermal Vias1

22.62

3.17

0.09

3.19

°C/W

1 Thermal impedance simulated values are based on a JEDEC 2S2P thermal

test board. See JEDEC JESD51.

2 N/A means not applicable.

ESD CAUTION

AD7779 bảng dữ liệu(PDF) 13 Page - Analog Devices

AD7779 bảng dữ liệu(HTML) 13 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97

bảng dữ liệu tải về

Link URL