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ADC12L032CIWM bảng dữ liệu(PDF) 26 Page - National Semiconductor (TI) |
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ADC12L032CIWM bảng dữ liệu(HTML) 26 Page - National Semiconductor (TI) |
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26 / 36 page ![]() Application Hints (Continued) in the power-down state. If a software power down instruc- tion is issued to the ADC while a hardware power up is in ef- fect (PD pin low), the device will power down. When the de- vice is powered down by software, it may be powered up by either issuing a software power up instruction or by taking PD pin high and then low. If the power down command is is- sued during an A/D conversion, that conversion is disrupted. Therefore, the data output after power up cannot be relied on. 1.6 User Mode and Test Mode An instruction may be issued to the ADC to put it into test mode. Test mode is used by the manufacturer to verify com- plete functionality of the device. During test mode CH0–CH7 become active outputs. If the device is inadvertently put into the test mode with CS low continuously, the serial communi- cations may be desynchronized. Synchronization may be re- gained by cycling the power supply voltage to the device. Cycling the power supply voltage will also set the device into user mode. If CS is used in the serial interface, the ADC may be queried to see what mode it is in. This is done by issuing a “read STATUS register” instruction to the ADC. When bit 9 of the status register is high the ADC is in test mode; when bit 9 is low the ADC is in user mode. As an alternative to cy- cling the power supply, an instruction sequence may be used to return the device to user mode. This instruction sequence must be issued to the ADC using CS. The following table lists the instructions required to return the device to user mode: Instruction DI Data DI0 DI1 DI2 DI3 DI4 DI5 DI6 DI7 TEST MODE H X X X HHHH RESET LLLL H H H L TEST MODE L L L LHLHL INSTRUCTIONS L L L LHLH H USER MODE LLLL HHHH Power Up L L L LHLHL Set DO with H or without or L L L H H L H Sign L Set H H Acquisition or or L L H H H L Time L L Start HHHH HHH a orororor L ororor Conversion LLLL LLL X = Don’t Care After returning to user mode with the user mode instruction the power up, data with or without sign, and acquisition time instructions need to be resent to ensure that the ADC is in the required state before a conversion is started. 1.7 Reading the Data Without Starting a Conversion The data from a particular conversion may be accessed without starting a new conversion by ensuring that the CONV line is taken high during the I/O sequence. See the Read Data timing diagrams. Table 6 describes the operation of the CONV pin. 2.0 DESCRIPTION OF THE ANALOG MULTIPLEXER For the ADC12L038, the analog input multiplexer can be configured with 4 differential channels or 8 single ended channels with the COM input as the zero reference or any combination thereof (see Figure 9 ). The difference between the voltages on the V REF + and V REF − pins determines the in- put voltage span (V REF). The analog input voltage range is 0 to V A +. Negative digital output codes result when V IN − > V IN +. The actual voltage at V IN − or V IN + cannot go below AGND. CH0, CH2, CH4, and CH6 can be assigned to the MUX- OUT1 pin in the differential configuration, while CH1, CH3, CH5, and CH7 can be assigned to the MUXOUT2 pin. In the differential configuration, the analog inputs are paired as fol- lows: CH0 with CH1, CH2 with CH3, CH4 with CH5 and CH6 with CH7. The A/DIN1 and A/DIN2 pins can be assigned positive or negative polarity. With the single-ended multiplexer configuration CH0 through CH7 can be assigned to the MUXOUT1 pin. The COM pin is always assigned to the MUXOUT2 pin. A/DIN1 is assigned as the positive input; A/DIN2 is assigned as the negative in- put. (See Figure 10 ). The Multiplexer assignment tables for the ADC12L030,2,4,8 ( Tables 2, 3, 4) summarize the aforementioned functions for the different versions of A/Ds. 4 Differential Channels DS011830-38 8 Single-Ended Channels with COM as Zero Reference DS011830-39 FIGURE 9. www.national.com 26 |
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