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IS25LP032 bảng dữ liệu(PDF) 63 Page - Integrated Silicon Solution, Inc

tên linh kiện IS25LP032
Giải thích chi tiết về linh kiện  3V SERIAL FLASH MEMORY WITH 133MHZ MULTI I/O SPI
PDF  90 Pages
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nhà sản xuất  ISSI [Integrated Silicon Solution, Inc]
Trang chủ  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LP032 bảng dữ liệu(HTML) 63 Page - Integrated Silicon Solution, Inc

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IS25LP032/064/128
Integrated Silicon Solution, Inc.- www.issi.com
63
Rev. D
10/03/2014
8.34 INFORMATION ROW READ OPERATION (IRRD, 68h)
The IRRD instruction is used to read memory data at up to a 133MHz clock in the voltage range, 2.7V to 3.6V.
The IRRD instruction code is followed by three address bytes (A23 - A0) and a dummy byte, transmitted via the
SI line, with each bit latched-in during the rising edge of SCK. Then the first data byte addressed is shifted out
on the SO line, with each bit shifted out at a maximum frequency fCT, during the falling edge of SCK.
The address is automatically incremented after each byte of data is shifted out. When the highest address is
reached, the address counter will roll over to the 000000h address, allowing the entire memory to be read with a
single IRRD instruction. The IRRD instruction is terminated by driving CE# high (VIH). If a IRRD instruction is
issued while an Erase, Program or Write cycle is in process (WIP=1) the instruction is ignored and will not have
any effects on the current cycle
Figure 8.50 IRRD COMMAND (Information Row Read) OPERATION
Instruction = 68h
Dummy Byte
CE #
SCK
SI
SO
0
1
...
7
8
9
...
31
32
33
...
39
40
41
...
47
Mode 3
Mode 0
3 Byte Address
Data Out
tV



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