IS25LP032 datasheet(49/90 Pages) ISSI

49 / 90 page

IS25LP032/064/128

Integrated Silicon Solution, Inc.- www.issi.com

Rev. D

10/03/2014

8.21 DEEP POWER DOWN (DP, B9h)

8.22 The Deep Power-down (DP) instruction is for setting the device on the minimizing the power consumption

(enter into Power-down mode). During this mode, standby current is reduced from Isb1 to Isb2. While in the

Power-down mode, the device is not active and all Write/Program/Erase instructions are ignored. The instruction

is initiated by driving the CE# pin low and shifting the instruction code “B9h” as shown in the figure 8.34. The

CE# pin must be driven high after the instruction has been latched, or Power-down mode will not engage. Once

CE# pin driven high, the Power-down mode will be entered within the time duration of tDP. While in the Power-

down mode only the Release from Power-down / RDID instruction, which restores the device to normal

operation, will be recognized. All other instructions are ignored, including the Read Status Register instruction

which is always available during normal operation. Ignoring all but one instruction makes the Power Down state

a useful condition for securing maximum write protection. It is available in both SPI and QPI mode.

Figure 8.34 Enter Deep Power Down Mode Operation. (SPI)

Instruction = B9h

CE #

SCK

...

Mode 3

Mode 0

tDP

Figure 8.35 Deep Power Down Sequence (QPI)

B9h

CE#

SCK

IO[3:0]

Mode 3

Mode 0

tDP

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