10

www.pericom.com

P-0.1

02/27/13

PI6C49021

Low Power High Integration Clock Generator

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Electrical Characteristics - 100MHz Differential HCSL Outputs

Unless otherwise specified, V

Parameter

Symbol

Conditions

Min

Typ

Max

Units

Output Frequency

100

MHz

Cycle-to-Cycle Jitter

T

CC/Jitter

150

ps

Peak-to-Peak Phase

Jitter

Using PCIe jitter measure-

ment method

86

PCIe 2.0 RMS Phase

Jitter

PCIe 2.0 Test Method @

100MHz Output

3.1

ps

Spread Modulation

Percentage

-0.5

0

%

Spread Modulation

Frequency

32

kHz

Duty Cycle

T

DC

45

50

55

%

Rising Edge Rate

Note 3, 4

0.6

4.0

V/ns

Falling Edge Rate

Note 3, 4

0.6

4.0

V/ns

Output Skew

T

OSKEW

V

threshold)

75

ps

High-Level Output

Voltage

V

OH

Note 2, (R

0.65

0.71

0.85

V

Low-Level Output

Voltage

V

OL

–0.20

0

0.05

Absolute Crossing

Point Voltage

V

CROSS

Note 2, 5, 6

0.25

0.55

V

Variation of VCROSS

over all rising clock

edges

V

CROSS Delta

Note 2, 5, 8

140

mV

Average Clock Period

Accuracy

T

PERIOD AVG

Note 3, 9, 10

–300

2800

ppm

Absolute Period

(including jitter and

spread spectrum)

T

PERIOD ABS

Note 3, 7

9.847

10.203

ns

Notes:

1. Measured at the end of an 8-inch trace with a 5pF load.

2. Measurement taken from a single-ended waveform.

3. Measurement taken from a differential waveform.

4. Measured from -150 mV to +150 mV on the differential waveform. The signal is monotonic through the measurement region for rise and fall time.

The 300 mV measurement window is centered on the differential zero crossing.

5. Measured at crossing point where the instantaneous voltage value of the rising edge of 100M+ equals the falling edge 100M–.

13-0015