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AD6674 bảng dữ liệu(PDF) 46 Page - Analog Devices

tên linh kiện AD6674
Giải thích chi tiết về linh kiện  385 MHz BW IF Diversity Receiver
PDF  91 Pages
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nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
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AD6674 bảng dữ liệu(HTML) 46 Page - Analog Devices

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AD6674
Data Sheet
FIR FILTERS
GENERAL DESCRIPTION
There are four sets of decimate by 2, low-pass, half-band, finite
impulse response (FIR) filters (labeled HB1 FIR, HB2 FIR, HB3
FIR, and HB4 FIR in Figure 99) following the frequency
translation stage. After the carrier of interest is tuned down to
dc (carrier frequency = 0 Hz), these filters efficiently lower the
sample rate, while providing sufficient alias rejection from
unwanted adjacent carriers around the bandwidth of interest.
HB1 FIR is always enabled and cannot be bypassed. The HB2,
HB3, and HB4 FIR filters are optional and can be bypassed for
higher output sample rates.
Table 17 shows the different bandwidths selectable by including
different half-band filters. In all cases, the DDC filtering stage
on the AD6674 provides <−0.001 dB of pass-band ripple and
>100 dB of stop-band alias rejection.
Table 18 shows the amount of stop-band alias rejection for
multiple pass-band ripple/cutoff points. The decimation ratio of
the filtering stage of each DDC can be controlled individually
through Bits[1:0] of the DDC control registers (Register 0x310,
Register 0x330, Register 0x350, and Register 0x370).
Table 17. DDC Filter Characteristics
ADC
Sample
Rate
(MSPS)
Half Band
Filter
Selection
Real Output
Complex (I/Q) Output
Alias
Protected
Bandwidth
(MHz)
Ideal SNR
Improvement1
(dB)
Pass-
Band
Ripple
(dB)
Alias
Rejection
(dB)
Decimation
Ratio
Output
Sample
Rate
(MSPS)
Decimation
Ratio
Output Sample Rate
(MSPS)
1000
HB1
1
1000
2
500 (I) + 500 (Q)
385.0
1
<−0.001
>100
HB1 + HB2
2
500
4
250 (I) + 250 (Q)
192.5
4
HB1 + HB2 +
HB3
4
250
8
125 (I) + 125 (Q)
96.3
7
HB1 + HB2 +
HB3 + HB4
8
125
16
62.5 (I) + 62.5 (Q)
48.1
10
750
HB1
1
750
2
375 (I) + 375 (Q)
288.8
1
HB1 + HB2
2
375
4
187.5 (I) + 187.5 (Q)
144.4
4
HB1 + HB2 +
HB3
4
187.5
8
93.75 (I) + 93.75 (Q)
72.2
7
HB1 + HB2 +
HB3 + HB4
8
93.75
16
46.875 (I) + 46.875 (Q)
36.1
10
500
HB1
1
500
2
250 (I) + 250 (Q)
192.5
1
HB1 + HB2
2
250
4
125 (I) + 125 (Q)
96.3
4
HB1 + HB2 +
HB3
4
125
8
62.5 (I) + 62.5 (Q)
48.1
7
HB1 + HB2 +
HB3 + HB4
8
62.5
16
31.25 (I) + 31.25 (Q)
24.1
10
1
Ideal SNR improvement due to oversampling and filtering = 10log(bandwidth/(fS/2)).
Table 18. DDC Filter Alias Rejection
Alias Rejection
(dB)
Pass-Band Ripple/Cutoff
Point (dB)
Alias Protected Bandwidth for Real
(I) Outputs1
Alias Protected Bandwidth for Complex
(I/Q) Outputs
>100
<−0.001
<38.5% × fOUT
<77% × fOUT
90
<−0.001
<38.7% × fOUT
<77.4% × fOUT
85
<−0.001
<38.9% × fOUT
<77.8% × fOUT
63.3
<−0.006
<40% × fOUT
<80% × fOUT
25
−0.5
44.4% × fOUT
88.8% × fOUT
19.3
−1.0
45.6% × fOUT
91.2% × fOUT
10.7
−3.0
48% × fOUT
96% × fOUT
1
fOUT = ADC input sample rate ÷ DDC decimation.
Rev. B | Page 46 of 91



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