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AT90LS4433-4AI bảng dữ liệu(PDF) 67 Page - ATMEL Corporation |
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AT90LS4433-4AI bảng dữ liệu(HTML) 67 Page - ATMEL Corporation |
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67 / 126 page ![]() 67 AT90S/LS4433 1042H–AVR–04/03 Figure 47. ADC Timing Diagram, Single Conversion Figure 48. ADC Timing Diagram, Free Run Conversion ADC Noise Canceler Function The ADC features a Noise Canceler that enables conversion during Idle mode to reduce noise induced from the CPU core. To make use of this feature, the following procedure should be used: 1. Make sure that the ADC is enabled and is not busy converting. Single Conver- sion mode must be selected and the ADC conversion complete interrupt must be enabled. Thus: ADEN = 1 ADSC = 0 ADFR = 0 ADIE = 1 2. Enter Idle mode. The ADC will start a conversion once the CPU has been halted. 3. If no other interrupts occur before the ADC conversion completes, the ADC inter- rupt will wake up the MCU and execute the ADC conversion complete interrupt routine. 1 2 3 4 5 6 7 8 9 10 11 12 13 Sign and MSB of Result LSB of Result ADC Clock ADSC ADIF ADCH ADCL Cycle Number 12 One Conversion Next Conversion 3 Sample & Hold MUX and REFS Update Conversion complete MUX and REFS Update 11 12 13 MSB of Result LSB of Result ADC Clock ADSC Hold Strobe ADIF ADCH ADCL Cycle Number 12 One Conversion Next Conversion |
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