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C161PI bảng dữ liệu(PDF) 49 Page - Infineon Technologies AG

tên linh kiện C161PI
Giải thích chi tiết về linh kiện  16-Bit Single-Chip Microcontroller
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nhà sản xuất  INFINEON [Infineon Technologies AG]
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C161PI bảng dữ liệu(HTML) 49 Page - Infineon Technologies AG

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&3,
Data Sheet
47
1999-07
The timings listed in the AC Characteristics that refer to TCLs therefore must be
calculated using the minimum TCL that is possible under the respective circumstances.
The actual minimum value for TCL depends on the jitter of the PLL. As the PLL is
constantly adjusting its output frequency so it corresponds to the applied input frequency
(crystal or oscillator) the relative deviation for periods of more than one TCL is lower than
for one single TCL (see formula and figure below).
For a period of
N * TCL the minimum value is computed using the corresponding
deviation D
N:
(
N * TCL)
min = N * TCLNOM - D
N
D
N [ns] = ±(13.3 + N*6.3) / ICPU [MHz],
where
N = number of consecutive TCLs
and 1
≤ N ≤ 40.
So for a period of 3 TCLs @ 25 MHz (i.e.
N = 3): D
3 = (13.3 + 3 * 6.3) / 25 = 1.288 ns,
and (3TCL)
min = 3TCLNOM - 1.288 ns = 58.7 ns (@ ICPU = 25 MHz).
This is especially important for bus cycles using waitstates and e.g. for the operation of
timers, serial interfaces, etc. For all slower operations and longer periods (e.g. pulse train
generation or measurement, lower baudrates, etc.) the deviation caused by the PLL jitter
is neglectible.
Note: For all periods longer than 40 TCL the N=40 value can be used (see figure below).
Figure 12
Approximated Maximum Accumulated PLL Jitter
40
20
10
5
1
±1
±10
±20
N
This approximated formula is valid for
1
≤ 1 ≤ 40 and 10MHz ≤ f
CPU ≤ 25MHz.
±26.5
Max.jitter D1 [ns]
20 MHz
25 MHz
16 MHz
10 MHz



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