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L9663 bảng dữ liệu(PDF) 68 Page - STMicroelectronics |
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L9663 bảng dữ liệu(HTML) 68 Page - STMicroelectronics |
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68 / 104 page ![]() Communication interface L9663 68/104 DocID028693 Rev 1 CH2_CR3 (PROG) Channel 2 Configuration Register 3 Address: 100001 Type: R/W Description: [4:0] CH2_NOB1: Number of data bits in time slot 1 01000: 8 data bits … 11100: 28 data bits others: default (20 bit) Settings programmed for time slot 1 are automatically applied to the other time slots in case at least one of the following conditions in CH2_CR2 register is verified: – READ_INIT_DATA2 = '1' – TSM2_SEL = ‘10’ (simple configuration) – SYNC2_EN = '0' (asynchronous mode) Although the settings of time slot 1 are automatically applied by the logic to other time slots, these are not written in corresponding configuration registers: so, reading by SPI the configuration of other time slots (TS2 to TS6) would not give correct values. In above conditions programming on the other time slots would be ignored. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Default value: 0000010100010100 R/W [15:12] RESERVED [11] CH2_CRCP4: Parity or CRC in time slot 4 0: CRC 1: parity [10:6] CH2_NOB4: Number of data bits in time slot 4 01000: 8 data bits … 11100: 28 data bits others: default (20 bit) [5] CH2_CRCP3: Parity or CRC in time slot 3 0: CRC 1: parity [4:0] CH2_NOB3: Number of data bits in time slot 3 01000: 8 data bits … 11100: 28 data bits others: default (20 bit) |
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