LAN8820I datasheet(71/83 Pages) MICROCHIP

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DS00001871B-page 71

LAN8820/LAN8820I

5.5.5.3

PHY RXC Delay Enabled Timing

Note 5-11

7.2ns for 1000BASE-T operation, 36ns for 100BASE-TX operation, 360ns for 10BASE-T operation.

Minimum limits are non-sustainable long term.

Note 5-12

8ns for 1000BASE-T operation, 40ns for 100BASE-TX operation, 400ns for 10BASE-T operation.

Note 5-13

8.8ns for 1000BASE-T operation, 44ns for 100BASE-TX operation, 440ns for 10BASE-T operation.

Maximum limits are non-sustainable long term.

Note 5-14

45% for 1000BASE-T operation, 40% for 100BASE-TX or 10BASE-T operation.

Note 5-15

55% for 1000BASE-T operation, 60% for 100BASE-TX or 10BASE-T operation.

FIGURE 5-7:

RGMII PHY RXC DELAY ENABLED TIMING

TABLE 5-16:

RGMII PHY RXC DELAY ENABLED TIMING VALUES

Symbol

Description

Min

Typ

Max

Units

trxc

RXC period

Note 5-11

Note 5-12

Note 5-13

tclkh

RXC high time

Note 5-14

Note 5-15

tclkl

RXC low time

Note 5-14

Note 5-15

tsetup

RXD[3:0], RXCTRL output setup from edge of

RXC

1.2

thold

RXD[3:0], RXCTRL output hold from edge of

RXC

1.2

RXC

RXD[3:0]

RXCTRL

tclkh

tclkl

trxc

RXD

[3:0]

RXD

[7:4]

RXDV

RXER

thold

tsetup

thold

tsetup

thold

tsetup

thold

tsetup

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