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AR0230CSSC00SUEA0-DRBR bảng dữ liệu(PDF) 30 Page - ON Semiconductor |
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AR0230CSSC00SUEA0-DRBR bảng dữ liệu(HTML) 30 Page - ON Semiconductor |
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30 / 36 page ![]() AR0230CS/D Rev. 8, Pub. 11/15 EN 30 ©Semiconductor Components Industries, LLC, 2015. AR0230CS: 1/2.7-Inch 2.1 Mp/Full HD Digital Image Sensor Electrical Specifications Note: Operating currents are measured in mA at the following conditions: - VAA = VAA_PIX = VDD_PLL = 2.8 V - VDD= VDD_IO = 1.8 V - VDD_SLVS = 1.8 V - PLL Enabled and PIXCLK = 74.25 MHz - 4-lane HiSPi mode - TA = 25°C HiSPi Electrical Specifications The ON Semiconductor AR0230CS sensor supports both SLVS and HiVCM HiSPi modes. Refer to the High-Speed Serial Pixel (HiSPi) Interface Physical Layer Specification v2.00.00 for electrical definitions, specifications, and timing information. The VDD_SLVS supply in this datasheet corresponds to VDD_TX in the HiSPi Physical Layer Specifica- tion. Similarly, VDD is equivalent to VDD_HiSPi as referenced in the specification. The DLL as implemented on AR0230CS is limited in the number of available delay steps and differs from the HiSPi specification as described in this section. Table 18: Line Interleaved HiSPi HiVcm Definition Condition Symbol Voltage Min Typ Max Digital Operating Current Streaming 1080p30 IDD 1.8 185 230 265 Analog Operating Current Streaming 1080p30 IDD_IO 2.8 20 36 55 Pixel Supply Current Streaming 1080p30 IAA 2.8 1 3.3 7 PLL Supply Current Streaming 1080p30 IAA_PIX 2.8 7 8.2 9.5 SLVS Supply Current Streaming 1080p30 IDD_PLL 1.8 102030 Power (mW) 429.4 583 717.2 Table 19: Channel Skew Measurement Conditions: VDD_HiSPi = 1.8V;VDD_HiSPi_TX = 0.4V; Data Rate =480 Mbps; DLL set to 0 Data Lane Skew in Reference to Clock tCHSKEW1PHY -150 ps |
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