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PIC16F628-20/SS bảng dữ liệu(PDF) 144 Page - Microchip Technology |
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PIC16F628-20/SS bảng dữ liệu(HTML) 144 Page - Microchip Technology |
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144 / 160 page ![]() PIC16F62X DS40300B-page 144 Preliminary © 1999 Microchip Technology Inc. TABLE 17-8: CAPTURE/COMPARE/PWM REQUIREMENTS FIGURE 17-12: TIMER0 CLOCK TIMING TABLE 17-9: TIMER0 CLOCK REQUIREMENTS Param No. Sym Characteristic Min Typ† Max Units Conditions 50* TccL CCP input low time No Prescaler 0.5TCY + 20 —— ns With Prescaler 16F62X 10 — — ns 16LF62X 20 — — ns 51* TccH CCP input high time No Prescaler 0.5TCY + 20 — — ns With Prescaler 16F62X 10 — — ns 16LF62X 20 — — ns 52* TccP CCP input period 3TCY + 40 N — — ns N = prescale value (1,4 or 16) 53* TccR CCP output rise time 16F62X 10 25 ns 16LF62X 25 45 ns 54* TccF CCP output fall time 16F62X 10 25 ns 16LF62X 25 45 ns * These parameters are characterized but not tested. †Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Parameter No. Sym Characteristic Min Typ† Max Units Conditions 40 Tt0H T0CKI High Pulse Width No Prescaler 0.5 TCY + 20* —— ns With Prescaler 10* — — ns 41 Tt0L T0CKI Low Pulse Width No Prescaler 0.5 TCY + 20* — — ns With Prescaler 10* — — ns 42 Tt0P T0CKI Period TCY + 40* N — — ns N = prescale value (1, 2, 4, ..., 256) * These parameters are characterized but not tested. † Data in "Typ" column is at 5.0V, 25 °C unless otherwise stated. These parameters are for design guidance only and are not tested. 41 42 40 RA4/T0CKI TMR0 |
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