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PIC16C72-04/SP bảng dữ liệu(PDF) 46 Page - Microchip Technology

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PIC16C72-04/SP bảng dữ liệu(HTML) 46 Page - Microchip Technology

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PIC16C72 Series
DS39016A-page 46
Preliminary
© 1998 Microchip Technology Inc.
TABLE 8-2
REGISTERS ASSOCIATED WITH SPI OPERATION (PIC16CR72)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Value on
all other
resets
0Bh,8Bh
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
0000 000u
0Ch
PIR1
(1)
ADIF
(1)
(1)
SSPIF
CCP1IF
TMR2IF TMR1IF 0000 0000 0000 0000
8Ch
PIE1
(1)
ADIE
(1)
(1)
SSPIE
CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
87h
TRISC
PORTC Data Direction Register
1111 1111
1111 1111
13h
SSPBUF
Synchronous Serial Port Receive Buffer/Transmit Register
xxxx xxxx
uuuu uuuu
14h
SSPCON
WCOL
SSPOV SSPEN
CKP
SSPM3
SSPM2
SSPM1
SSPM0
0000 0000
0000 0000
85h
TRISA
—
—
PORTA Data Direction Register
--11 1111
--11 1111
94h
SSPSTAT
SMP
CKE
D/A
P
S
R/W
UA
BF
0000 0000
0000 0000
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by the SSP in SPI mode.
Note 1:
Always maintain these bits clear.



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