PIC17C752-08SLASHP datasheet(50/320 Pages) MICROCHIP

50 / 320 page

PIC17C75X

DS30264A-page 50

Preliminary

7.3

Stack Operation

PIC17C75X devices have a 16 x 16-bit hardware stack

(Figure 7-1). The stack is not part of either the program

or data memory space, and the stack pointer is neither

readable nor writable. The PC (Program Counter) is

“PUSHed” onto the stack when a CALL or LCALL

instruction is executed or an interrupt is acknowledged.

The stack is “POPed” in the event of a RETURN, RETLW,

or a RETFIE instruction execution. PCLATH is not

affected by a “PUSH” or a “POP” operation.

The stack operates as a circular buffer, with the stack

pointer initialized to '0' after all resets. There is a stack

available bit (STKAV) to allow software to ensure that

the stack has not overﬂowed. The STKAV bit is set

after a device reset. When the stack pointer equals Fh,

STKAV is cleared. When the stack pointer rolls over

from Fh to 0h, the STKAV bit will be held clear until a

device reset.

After the device is “PUSHed” sixteen times (without a

“POP”), the seventeenth push overwrites the value

from the ﬁrst push. The eighteenth push overwrites the

second push (and so on).

Note 1: There is not a status bit for stack under-

ﬂow. The STKAV bit can be used to detect

the underﬂow which results in the stack

pointer being at the top of stack.

Note 2: There are no instruction mnemonics

called PUSH or POP. These are actions

that occur from the execution of the CALL,

RETURN

, RETLW, and RETFIE instruc-

tions, or the vectoring to an interrupt vec-

tor.

Note 3: After a reset, if a “POP” operation occurs

before a “PUSH” operation, the STKAV bit

will be cleared. This will appear as if the

stack is full (underﬂow has occurred). If a

“PUSH” operation occurs next (before

another “POP”), the STKAV bit will be

locked clear. Only a device reset will

cause this bit to set.

7.4

Indirect Addressing

Indirect addressing is a mode of addressing data

memory where the data memory address in the

instruction is not ﬁxed. That is, the register that is to be

read or written can be modiﬁed by the program. This

can be useful for data tables in the data memory.

Figure 7-9 shows the operation of indirect addressing.

This shows the moving of the value to the data mem-

ory address speciﬁed by the value of the FSR register.

Example 7-1 shows the use of indirect addressing to

clear RAM in a minimum number of instructions. A

similar concept could be used to move a deﬁned num-

ber of bytes (block) of data to the USART transmit reg-

ister (TXREG). The starting address of the block of

data to be transmitted could easily be modiﬁed by the

program.

FIGURE 7-9: INDIRECT ADDRESSING

Opcode

Address

File = INDFx

FSR

Instruction

Executed

Instruction

Fetched

RAM

Opcode

File

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