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PIC16F872/SP bảng dữ liệu(PDF) 91 Page - Microchip Technology |
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PIC16F872/SP bảng dữ liệu(HTML) 91 Page - Microchip Technology |
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91 / 160 page ![]() © 1999 Microchip Technology Inc. Preliminary DS30221A-page 91 PIC16F872 10.4 A/D Conversions Clearing the GO/DONE bit during a conversion will abort the current conversion. The A/D result register pair will NOT be updated with the partially completed A/D conversion sample. That is, the ADRESH:ADRESL registers will continue to contain the value of the last completed conversion (or the last value written to the ADRESH:ADRESL registers). After the A/D conversion is aborted, a 2TAD wait is required before the next acquisition is started. After this 2TAD wait, acquisition on the selected channel is automatically started. In Figure 10-3, after the GO bit is set, the first time seg- ment has a minimum of TCY and a maximum of TAD. FIGURE 10-3: A/D CONVERSION TAD CYCLES Note: The GO/DONE bit should NOT be set in the same instruction that turns on the A/D. TAD1 TAD2 TAD3 TAD4 TAD5 TAD6 TAD7 TAD8 TAD9 Set GO bit Holding capacitor is disconnected from analog input (typically 100 ns) b9 b8 b7 b6 b5 b4 b3 b2 TAD10 TAD11 b1 b0 TCY to TAD Conversion Starts ADRES is loaded, GO bit is cleared, ADIF bit is set, holding capacitor is connected to analog input. |
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