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PALCE20V8 Family

The fixed OR array allows up to eight data product terms per output for logic functions. The

sum of these products feeds the output macrocell. Each macrocell can be programmed as

registered or combinatorial with an active-high or active-low output. The output configuration

is determined by two global bits and one local bit controlling four multiplexers in each

macrocell.

BLOCK DIAGRAM

FUNCTIONAL DESCRIPTION

The PALCE20V8 is a universal PAL device. It has eight independently configurable macrocells

combinatorial I/O, or dedicated input. The programming matrix implements a programmable

AND logic array, which drives a fixed OR logic array. Buffers for device inputs have

complementary outputs to provide user-programmable input signal polarity. Pins 1 and 13 serve

either as array inputs or as clock (CLK) and output enable (OE) for all flip-flops.

unprogrammed (disconnected) assume the logical HIGH state, and product terms with both true

and complement of any input signal connected assume a logical LOW state.

The programmable functions on the PALCE20V8 are automatically configured from the user’s

design specification, which can be in a number of formats. The design specification is processed

Programmable AND Array

40 x 64

MACRO

MACRO

MACRO

MACRO

MACRO

MACRO

MACRO

OE

10

I1 – I10

16491E

Input

Mux.

MACRO

Input

Mux.