DocID026046 Rev 1

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AN4457

UART emulator description

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1.4

Data reception

The reception is launched when the start bit is detected via an external interrupt on UART

RX line.

Figure 3 shows the waveforms of a 9-bit receive emulation.

Figure 3. 9-bit data reception waveforms

1.4.1

Single-frame reception

Reception starts when the start bit is detected. The reception sequence includes the

following steps:

1.

The CPU checks if the UART is ready and the RX buffer empty.

2.

The timer sends a request to the DMA to start data transfer after a half bit duration.

3.

The timer starts counting the bit duration according to the defined baudrate and then

sends to the DMA a request to transfer the next bit. This step is repeated until the end

of the frame.

Once the frame reception is complete, the RC flag (UART reception complete) is set.

1.4.2

Multiple-frame reception

When the falling edge of the start bit is detected, the reception goes on until all frames are

received and the RC flag is set.

When the DMA transfer of each frame is complete, the CPU formats data and stores them in

SRAM.

Note:

During DMA transfer, the CPU is free for other tasks.

The application must assign the highest priority to the external interrupt for bit start

detection.