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AN2009 bảng dữ liệu(PDF) 27 Page - STMicroelectronics |
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AN2009 bảng dữ liệu(HTML) 27 Page - STMicroelectronics |
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27 / 39 page ![]() 27/39 PWM MANAGEMENT FOR 3-PHASE BLDC MOTOR DRIVES USING THE ST7MC Figure 17. Oscilloscope waveform: synchronous rectification 2 6.2 SYNCHRONOUS RECTIFICATION CONFIGURATION When driving a PM BLDC motor (PCN bit is reset in MDTG register), the PWM applied to the output channel depends if the motor is driven in voltage or current mode but the dead times are applied in the same way regardless of the source of the PWM signal. As soon as the dead time generator is activated (DTE bit is set in MDTG register), a comple- mentary PWM is applied to the adjacent switch. The dead time value is set-up through the bits DTG [5:0] in MDTG register. The range can go from 125ns to 16µs with steps of 125ns, 250ns and 500ns when Fmtc is 16MHz. Note: It is also possible to add a chopper on the PWM signal output using bits HFE[1:0] and HFRQ[2:0] in the MREF register. DEAD TIME GENERATOR REGISTER (MDTG) Read/Write (except bits 5:0 write once-only) Reset Value: 1111 1111 (FFh) Bit 7 = PCN: Number of PWM Channels. 0: Only PWM U signal is output to the PWM manager for six-step mode motor control (e.g. PM BLDC motors) 1: The three PWM signals U, V and W are output to the channel manager (e.g. for three-phase sinewave generation) 7 0 PCN DTE DTG5 DTG4 DTG3 DTG2 DTG1 DTG0 3. signal on the adjacent switch, 1. Current Waveform in Phase A 2. signal on the high side switch of phase A rectification is enabled and a the low side switch of phase A when the synchronous dead time is set |
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