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AN2009 bảng dữ liệu(PDF) 18 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  PWM MANAGEMENT FOR 3-PHASE BLDC MOTOR DRIVES USING THE ST7MC
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PWM MANAGEMENT FOR 3-PHASE BLDC MOTOR DRIVES USING THE ST7MC
Table 2. off time table
4.3 SUMMARY VOLTAGE/CURRENT MODE
In voltage mode, the 12-bit timer PWM signal (compare U register) gives the voltage to be ap-
plied to the motor. This PWM signal is applied to the switches. The internal clock is not used
in this mode.
A current limitation is implemented in voltage mode. The current limitation can be set by an ex-
ternal divider resistor or by an other PWM signal filtered.
In current mode, the 12-bit timer PWM signal gives the reference current to be applied to the
motor. This signal has to be filtered by an external RC. The internal clock is used and the
PWM signal from the internal clock is applied to the switches.
In current mode, the current is regulated by comparing the reference current and the feedback
current from the motor.
OT3
OT2
OT1
OT0
Off Time sensorless
mode (SR=0)
(DS[3:0]=0)
Sensor Mode (SR=1) or sampling
during ON time in sensorless
(SPLG =1 and/or DS[3:0] bits)
0
0
0
0
2.5 µs
No minimum off time
0
0
0
1
5 µs
0
0
1
0
7.5 µs
0
0
1
1
10 µs
0
1
0
0
12.5 µs
0
1
0
1
15 µs
0
1
1
0
17.5 µs
0
1
1
1
20 µs
1
0
0
0
22.5 µs
1
0
0
1
25 µs
1
0
1
0
27.5 µs
1
0
1
1
30 µs
1
1
0
0
32.5 µs
1
1
0
1
35 µs
1
1
1
0
37.5 µs
1
1
1
1
40 µs



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