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AN3308 bảng dữ liệu(PDF) 45 Page - STMicroelectronics

tên linh kiện AN3308
Giải thích chi tiết về linh kiện  This document describes the low-voltage 3-axis digital output linear MEMS accelerometer provided in an LGA package
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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AN3308 bảng dữ liệu(HTML) 45 Page - STMicroelectronics

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AN3308
First in first out (FIFO) buffer
Doc ID 18198 Rev 1
45/52
Figure 25.
Stream mode fast reading behavior
In stream mode, the FIFO buffer is continuously filling (from F0 to F31) at the selected
output data rate. When the buffer is full the OVRN flag goes up and the suggested solution
is to read all FIFO samples (192 bytes) faster then 1*ODR, in order to make free FIFO slots
available for the new acceleration samples. This allows to avoid loss of data and to decrease
the host processor interaction increasing system efficiency. If the reading procedure is not
fast enough, three different cases can be observed:
1.
FIFO sample set (6 bytes) reading faster than 1*ODR: data are correctly retrieved
because a free slot is made available before new data is generated.
2.
FIFO sample set (6 bytes) reading synchronous to 1*ODR: data are correctly retrieved
because a free slot is made available before new data is generated but FIFO benefits
are not exploited. This case is equivalent to read data on data ready interrupt and does
not reduce the host processor interaction compared to the standard accelerometer
reading.
3.
FIFO sample set (6 bytes) reading slower than 1*ODR: in this case some data is lost
because data recovery is not fast enough to free slots for new acceleration data
Figure 26. The number of correctly recovered samples is related to the difference
between the current ODR and the FIFO sample set reading rate.
Figure 26.
Stream mode slow reading behavior



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