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Giải thích chi tiết về linh kiện  Solution for designing a 400 W fixed-off-time controlled
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Designing a fixed-off-time PFC
AN3142
18/44
Doc ID 17005 Rev 3
Equation 33
Where Cd is the total drain capacitance including the MOSFET and the other parasitic
capacitances such as inductor etc. At the drain node, VMOS is the drain voltage at MOSFET
turn-on.
Taking into account the frequency variation with the input line voltage and the phase angle
similar to
Equation 32, a detailed description of the capacitive losses per 1 nF of total drain
capacitance can be calculated as:
Equation 34
The total drain capacitance of the two MOSFETs is //Cd = 0.36 nF, Vout is the drain voltage
at MOSFET turn-on.
The function of the total losses of the input mains voltage is the sum of the three previous
losses from
Equation 30, Equation 32, and Equation 34, multiplied for the two parallel
MOSFET parameters:
Equation 35
From
Equation 35, using the data relevant to the MOSFET selected and calculating the
losses at VACmin and VACmax, we observe that the maximum total losses occurs at VACmin
which is 9 W. From this number and the maximum ambient temperature
(13), the total
maximum thermal resistance required to keep the junction temperature below 125°C is:
Equation 36
If the result of
Equation 36 is lower than the junction-ambient thermal resistance given in the
MOSFET datasheet for the selected device package, a heat sink must be used.
)
VAC
(
f
V
C
2
1
)
VAC
(
P
sw
MOS
2
d
cap
⋅
⋅
⋅
=
()
ϑ
⋅
ϑ
π
⋅
=
′
∫
π
d
)
,
VAC
(
f
V
1
2
1
)
VAC
(
P
0
sw
2
out
cap
)
VAC
(
P
C
)
VAC
(
P
2
t
t
)
VAC
(
P
RDS
)
VAC
(
P
cap
d
sw
fall
rise
cond
on
loss
′
⋅
+
′
⋅
⎟
⎠
⎞
⎜
⎝
⎛
+
+
′
⋅
=
)
VAC
(
P
T
C
125
R
loss
ambx
th
−
°
=
W
C
1
.
8
W
9
C
50
C
125
R
th
°
=
°
−
°
=



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