AN3392 datasheet(37/57 Pages) STMICROELECTRONICS

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AN3392

Layout guidelines

Doc ID 018749 Rev 1

37/57

Layout guidelines

The PCB layout is very important in order to minimize noise, high frequency resonance

problems and electromagnetic interference.

Paths between each inductor and its relative pin must be designed with the same

resistance. Different resistances between the four branches can be the root cause of an

unbalanced current flow among the four branches. Unbalanced currents can cause damage

and a poor tracking of the MPPT.

The same approach must be followed for the four VOUT tracks.

It is essential to keep the paths where the high switching current circulates as small as

possible. This reduces radiation and electromagnetic resonance problems.

Large traces for high current paths and an extended ground plane under the metal slug of

the package help reduce noise and heat dissipation (which is strongly impacted by the

thermal vias as well), and also increase efficiency.

Boost capacitors must be connected as close as possible to the Lx and CBx pins.

It is also suggested to connect the bootstrap capacitor directly to the Lx track making sure

there is no voltage drop between the Lx pin and bootstrap capacitor connection due to

current flowing through Lx.

The output and input capacitors should be very close to the device.

The external resistor dividers, if used, should be as close as possible to the VIN_SNS and

VOUT_SNS of the device, and as far as possible from high current circulating paths, to avoid

noise pickup.

As an example of a recommended layout, see the demonstration board in Figure 25 and 26:

Figure 25.

PCB layout example (top view)

AN3392 bảng dữ liệu(PDF) 37 Page - STMicroelectronics