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AN3392 bảng dữ liệu(PDF) 16 Page - STMicroelectronics |
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AN3392 bảng dữ liệu(HTML) 16 Page - STMicroelectronics |
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16 / 57 page ![]() SPV1020 functions AN3392 16/57 Doc ID 018749 Rev 1 6.3 Burst mode This mode guarantees a correct startup for the SPV1020, avoiding voltage oscillations. After the input voltage is applied, the converter begins operation when the input voltage exceeds 6.5 V (ULVO_H). Burst mode contains four internal states, which guarantee to gradually activate phase “1” and sequentially the four phases. Figure 13 shows the FSM of burst mode (the grey circles are the burst mode states). Each phase is driven with a set of 10 “pulses”. Each pulse can be “ON”, driving the phase with a signal at a minimum PWM duty cycle of 5%, or “OFF”, with the driving signal completely low. When activated, a phase is driven with 1 pulse “ON” and 9 pulses “OFF”. The number of “ON” pulses can be increased up to 10 (in this case, another phase is activated), or decreased down to 0 (the phase is always OFF). An increase or decrease of “ON” pulses depends on the status of the ULVO signal that checks if the input voltage is greater than the minimum threshold or not. Figure 13. Burst mode FSM When all four phases are active, the system enters normal (or MPPT) mode. 6.4 Normal/MPPT mode This mode guarantees the maximum power extraction from a photovoltaic input supply by executing an MPPT algorithm. The MPPT algorithm generates a voltage reference (Vref) for a PWM generator. The resulting waveform, with a duty cycle (DC) proportional to Vref, drives the eight internal switching elements. Only Phase “1” is active •n pulses @DC=5% • (10-n) pulses @DC=0% [UVLO is ON] OFF State [UVLO is OFF] [UVLO is ON] [Check UVLO] [n = 1] If UVLO is ON [n = n+1] else [n = n -1] [UVLO is OFF] & [n is 1] [UVLO is ON] & [n is 10] Phases 1 & 3 active @DC=5% Phases 1, 3 & 2 active @DC=5% Phases 1, 3, 2 & 4 active @DC=5% Normal Mode [UVLO is OFF] [UVLO is ON] [UVLO is OFF] [UVLO is ON] [UVLO is OFF] AM02600v1 |
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