AN3392 datasheet(33/57 Pages) STMICROELECTRONICS

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AN3392

External component selection

Doc ID 018749 Rev 1

33/57

In order to optimize the efficiency of the entire system, the selection of R1 and R2, should

take their power dissipation into account.

Assuming negligible the current flowing through pin VIN_SNS, maximum power dissipation

of the series R1+R2 is:

Equation 16

Empirically, R1 and R2 should be selected according to:

Equation 17

Note:

In order to guarantee the proper functionality of pin VIN_SNS, current flowing in the series

R1+R2 should be in the range between 20 µA and 200 µA.

10.7

Input voltage sensing capacitor

C9 is placed in parallel with R2 and as close as possible to pin VIN_SNS.

Its role is to stabilize as much as possible the voltage sensed by pin VIN_SNS.

Critical parameters for the capacitor are: capacitance, maximum voltage, and ESR.

Maximum voltage: if R1 and R2 have been properly chosen, to partition Vin to 1.25 V, then

the maximum voltage of this capacitor can be in the range from 3.3 V or higher.

The capacitance value depends on the time constant (

in) composed with R1+R2 (τin=

C6*R1//R2) and by the system switching frequency (FSSW = 4*FSW).

Assuming R1 >> R2 (so, R1//R2 ~= R2):

Equation 18

so,

Equation 19

Note:

Even if the SPV1020 controls each phase at FSW (by default 100 kHz), the system switching

frequency (FSSW) is four times the single-phase switching frequency (by default 400 kHz).

10.8

Output voltage capacitors

A minimum output capacitance must be added at the output, in order to reduce the voltage

ripple.

vin_sns

Voc

()

----------------------

vin_sns

1% V

in_max

⋅

()

ssw

------------

⋅

≅

ssw

------------

--------

⋅⋅

≅

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