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UM0438

Glossary

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Appendix B

Glossary

The glossary contains an alphabetical list of terms, phrases, and abbreviations used in this

book. Some of the terms and definitions included in the glossary are reprinted from IEEE

Institute of Electrical and Electronics Engineers, Inc. with the permission of the IEEE.

Note that some terms are defined in the context of how they are used in this book.

Architecture

A detailed specification of requirements for a processor or computer system. It does not

specify details of how the processor or computer system must be implemented; instead it

provides a template for a family of compatible implementations.

Biased exponent

An exponent whose range of values is shifted by a constant (bias). Typically a bias is

provided to allow a range of positive values to express a range that includes both positive

and negative values.

Big-endian

A byte-ordering method in memory where the address n of a word corresponds to the most-

significant byte. In an addressed memory word, the bytes are ordered (left to right) 0, 1, 2, 3,

with 0 being the most-significant byte. See Little-endian.

Cache

High-speed memory component containing recently-accessed data and/or instructions

(subset of main memory).

Denormalized number

A nonzero floating-point number whose exponent has a reserved value, usually the format's

minimum, and whose explicit or implicit leading significant bit is zero.

Effective address (EA)

The 32- or 64-bit address specified for a load, store, or an instruction fetch. This address is

then submitted to the MMU for translation to either a physical memory address or an I/O

address.

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