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CDP1805ACE bảng dữ liệu(PDF) 24 Page - Intersil Corporation

tên linh kiện CDP1805ACE
Giải thích chi tiết về linh kiện  CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer
PDF  30 Pages
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nhà sản xuất  INTERSIL [Intersil Corporation]
Trang chủ  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CDP1805ACE bảng dữ liệu(HTML) 24 Page - Intersil Corporation

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TABLE 2. CONDITIONS ON DATA BUS AND MEMORY ADDRESS LINES DURING ALL MACHINE STATES
STATE
I
N
MNEMONIC
OPERATION
DATA
BUS
MEMORY
ADDRESS
MRD
MWR
N
LINES
S1
RESET
0
→ Q, I, N, COUNTER,
PRESCALER, CIL;
1
→ CIE, XIE
00
UNDE-
FINED
11
0
S1
INITIALIZE, NOT PROGRAMMER AC-
CESSIBLE
X, P
→ T THEN
0
→ X, P; 1 → MIE, 0000 → R0
00
(Note 20)
UNDE-
FINED
11
0
S0
FETCH
MRP
→ I, N; RP + 1 → RP
MRP
RP
0
1
0
S1
0
0
IDL
STOP AT TPB
WAIT FOR DMA OR INT
HIGH Z
RO
1
1
0
S1
0
1-F
LDN
MRN
→ D
MRN
RN
0
1
0
S1
1
0-F
INC
RN + 1
→ RN
HIGH Z
RN
1
1
0
S1
2
0-F
DEC
RN - 1
→ RN
HIGH Z
RN
1
1
0
S1
3
0-F
SHORT
BRANCH
TAKEN: MRP
→ RP.0
NOT TAKEN: RP + 1
→ RP
MRP
RP
0
1
0
S1
4
0-F
LDA
MRN
→ D; RN + 1 → RN
MRN
RN
0
1
0
S1
5
0-F
STR
D
→ MRN
D
RN
1
0
0
S1
6
0
IRX
RX + 1
→ RX
MRX
RX
1
1
0
S1
6
1
OUT 1
MRX
→ BUS; RX + 1 → RX
MRX
RX
0
1
1
S1
6
2
OUT 2
MRX
→ BUS; RX + 1 → RX
MRX
RX
0
1
2
S1
6
3
OUT 3
MRX
→ BUS; RX + 1 → RX
MRX
RX
0
1
3
S1
6
4
OUT 4
MRX
→ BUS; RX + 1 → RX
MRX
RX
0
1
4
S1
6
5
OUT 5
MRX
→ BUS; RX + 1 → RX
MRX
RX
0
1
5
S1
6
6
OUT 6
MRX
→ BUS; RX + 1 → RX
MRX
RX
0
1
6
S1
6
7
OUT 7
MRX
→ BUS; RX + 1 → RX
MRX
RX
0
1
7
S1
6
9
INP 1
BUS
→ MRX, D
DATA
FROM
I/O
DEVICE
RX
1
0
1
S1
6
A
INP 2
BUS
→ MRX, D
DATA
FROM
I/O
DEVICE
RX
1
0
2
S1
6
B
INP 3
BUS
→ MRX, D
DATA
FROM
I/O
DEVICE
RX
1
0
3
S1
6
C
INP 4
BUS
→ MRX, D
DATA
FROM
I/O
DEVICE
RX
1
0
4
S1
6
D
INP 5
BUS
→ MRX, D
DATA
FROM
I/O
DEVICE
RX
1
0
5
CDP1805AC, CDP1806AC



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