AT90PWM161 datasheet(39/327 Pages) ATMEL

39 / 327 page

7734Q–AVR–02/12

AT90PWM81/161

5.4

System Clock Prescaler

5.4.1

Features

The AT90PWM81/161 system clock can be divided by setting the Clock Prescaler Register –

CLKPR. This feature can be used to decrease power consumption when the requirement for

processing power is low. This can be used with all clock source options, and it will affect the

clock frequency of the CPU and all synchronous peripherals. clk

I/O, clkADC, clkCPU, and clkFLASH

are divided by a factor as shown in Table 5-10 on page 40.

5.4.2

Switching Time

When switching between prescaler settings, the System Clock Prescaler ensures that no

glitches occur in the clock system and that no intermediate frequency is higher than neither the

clock frequency corresponding to the previous setting, nor the clock frequency corresponding to

the new setting.

The ripple counter that implements the prescaler runs at the frequency of the undivided clock,

which may be faster than the CPU’s clock frequency. Hence, it is not possible to determine the

state of the prescaler – even if it were readable, and the exact time it takes to switch from one

clock division to another cannot be exactly predicted.

From the time the CLKPS values are written, it takes between T1 + T2 and T1 + 2 × T2 before

the new clock frequency is active. In this interval, 2 active clock edges are produced. Here, T1 is

the previous clock period, and T2 is the period corresponding to the new prescaler setting.

5.5

5.5.1

OSCCAL – Oscillator Calibration Register

• Bits 7:0 – CAL7:0: Oscillator Calibration Value

The Oscillator Calibration Register is used to trim the Calibrated Internal RC Oscillator to

remove process variations from the oscillator frequency. The factory-calibrated value is automat-

ically written to this register during chip reset, giving an oscillator frequency of 8.0MHz at 25°C.

The application software can write this register to change the oscillator frequency. The oscillator

can be calibrated to any frequency in the range 7.6MHz - 8.4MHz within ±1% accuracy. Calibra-

tion outside that range is not guaranteed.

Note that this oscillator is used to time EEPROM and Flash write accesses, and these write

times will be affected accordingly. If the EEPROM or Flash are written, do not calibrate to more

than 8.8MHz. Otherwise, the EEPROM or Flash write may fail.

The CAL7..0 bits are used to tune the frequency within the selected range. A setting of 0x00

gives the lowest frequency in that range, and a setting of 0x7F gives the highest frequency in the

range. Incrementing CAL7..0 by 1 will give a frequency increment of less than 0.5% in the fre-

quency range 7.6MHz - 8.4MHz.

Bit

543210

CAL7

CAL6

CAL5

CAL4

CAL3

CAL2

CAL1

CAL0

OSCCAL

Read/Write

R/W

Initial Value

Device Specific Calibration Value

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