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GDC21D301A bảng dữ liệu(PDF) 10 Page - Hynix Semiconductor

tên linh kiện GDC21D301A
Giải thích chi tiết về linh kiện  Transport Decoder
PDF  35 Pages
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nhà sản xuất  HYNIX [Hynix Semiconductor]
Trang chủ  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

GDC21D301A bảng dữ liệu(HTML) 10 Page - Hynix Semiconductor

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GDC21D301A
Pin Description (continued)
NAME
PIN
TYPE
DESCRIPTION
AUXILIARY DATA DECODER INTERFACE
\DATA_WAIT
91
I
Auxiliary Data Wait (active low).
This signal indicates that the access of registers in the auxiliary
decoder is ready.
\DATA_REQ
92
I
Auxiliary Data Request (active low).
This signal is asserted when an auxiliary device requests data
from the GDC21D301A.
\DATA_STRB
108
O
Auxiliary Data Strobe (active low).
This signal qualifies data contained in VAD_DATA[7:0]. This
auxiliary decoder should latch the auxiliary data on the rising
edge of DATA_STRB.
\DATA_DCS
107
O
Auxiliary Select (active low).
This signal activates data transfers between the auxiliary
decoder and the host processor. Host processor can access the
registers of the auxiliary decoder.
BOF_D
97
I
Begin of Frame2.
On the rising edge of this signal, STC, the counted PCR value,
is copied to STC3_reg.
SCAN TEST
SCAN_MODE
44
I
Scan Test Mode Enable Input.
It has to be connected to VSS level.
SCAN_TEST
45
I
Scan Test Mode Enable Input.
It has to be connected to VSS level.
SCAN_IN1
46
I
Scan-path Input on Scan Test Mode.
It has to be connected to VSS level.
SCAN_OUT1
111
O
Scan-path Output on Scan Test Mode
POWER AND GROUND
VDD
7, 10, 33, 48,
58,68,70,82,
100,113,121,
124
PWR
3.3 V Power Supply
VSS
4,15,24,35,
53,63,72,77,
87,102,106,
118,130
GND
Ground



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