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MB86604LPFV bảng dữ liệu(PDF) 7 Page - fujitsu semiconductor

tên linh kiện MB86604LPFV
Giải thích chi tiết về linh kiện  SCSI-II Protocol Controller (with single-ended driver/receiver)
PDF  56 Pages
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nhà sản xuất  FUJITSU [fujitsu semiconductor]
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7
MB86604L
(Continued)
* : The pin symbols in parenthesis are the ones when the MODE input is “L”.
4.
Others
* : The pin symbols in parenthesis are the symbols when the MODE input is “L”.
Pin
number
Symbol*
Pin name
I/O
Function
50
DMBHE
(DMUDS)
DMA bus
high enable
(DMA upper
data strobe)
I
In the 80-series mode, this pin is for the DMA bus high enable
signal input pin (DMBHE) output from the DMA controller when
the upper byte of the DMA data bus is valid. This is an active-low
pin. In the 68-series mode, this pin functions as the DMA upper
data strobe signal input pin (DMUDS) output from the DMA
controller when the upper byte of data bus is valid. The DMUDS
pin is also an active-low.
30
DMA0
DMA
address 0
I
In the 80-series mode, this pin is used for the DMA address 0
input pin output from the DMA controller. In the 68-series mode,
a high level should be input to this pin.
55
TP
Transfer
permission
I
This is a DMA transfer permission signal input pin. When this pin
is in active-state, the SPC does the DMA transfer. In case that
this pin becomes inactive during the DMA transfer, the DMA
transfer is paused on the block boundary. This pin is an active
high.
Pin
number
Symbol*
Pin name
I/O
Function
6
RESET
Reset
I
System reset input pin. The input reset active pulse width must
have 4 times of the clock cycle at least. This is an active-low pin.
5
CLK
Clock
I
Clock signal input pin. 20 MHz, 30 MHz, or 40 MHz can be
applied as the input clock frequency.
3, 14, 28
53, 64, 78
VDD
Power supply
—
+5 V power supply pins.
4, 10, 15
16, 21, 29
40, 54, 59
65, 66, 70
79, 90
VSS
Ground
—
Ground pins.
23
TEST1
TEST
I
This pin is used to select the type of I/O buffer on SCSI data bus
pins. In case that DBP, DB7 – DB0 pins are used as an open-
drain I/O, connect this pin to VSS. In case of three-state I/O,
connect to VDD.
57
TEST2
TEST
I
This pin is used to select the type of I/O buffer on SCSI pins. In
case that MSG, C/D, I/O, and ATN pins are used as an open-
drain I/O, connect this pin to VSS. In case of three-state I/O,
connect to VDD.
24
TMOUT
TIMEOUT
O
This is a SCSI Timeout pin that indicates the SPC has been
busy longer than the specified time. A high level is output on this
pin if the SPC busy time exceeds the specified time.
This pin can be used for the timeout counter.
25, 26
(OPEN)
(Open)
—
These are open pins. Those pins are not connected with the
device internally. Those pins must be left open.



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