ADF7021 datasheet(62/64 Pages) AD

62 / 64 page

ADF7021

Data Sheet

Rev. B | Page 62 of 64

OUTLINE DIMENSIONS

FOR PROPER CONNECTION OF

THE EXPOSED PAD, REFER TO

THE PIN CONFIGURATION AND

FUNCTION DESCRIPTIONS

SECTION OF THIS DATA SHEET.

COMPLIANT TO JEDEC STANDARDS MO-220-WKKD.

0.50

BSC

BOTTOM VIEW

TOP VIEW

PIN 1

INDICATOR

7.00

BSC SQ

EXPOSED

PAD

PIN 1

INDICATOR

4.25

4.10 SQ

3.95

0.45

0.40

0.35

SEATING

PLANE

0.80

0.75

0.70

0.05 MAX

0.02 NOM

0.20 MIN

0.20 REF

COPLANARITY

0.08

0.30

0.23

0.18

Figure 78. 48-Lead Lead Frame Chip Scale Package [LFCSP_WQ]

7 mm × 7 mm Body, Very Very Thin Quad

(CP-48-5)

Dimensions shown in millimeters

ORDERING GUIDE

Model1

Temperature Range

Package Description

Package Option

ADF7021BCPZ

−40°C to +85°C

48-Lead Lead Frame Chip Scale Package [LFCSP_WQ]

CP-48-5

ADF7021BCPZ-RL

−40°C to +85°C

48-Lead Lead Frame Chip Scale Package [LFCSP_WQ]

CP-48-5

ADF7021BCPZ-RL7

−40°C to +85°C

48-Lead Lead Frame Chip Scale Package [LFCSP_WQ]

CP-48-5

EVAL-ADF70XXMBZ

Control Mother Board

EVAL-ADF70XXMBZ2

Evaluation Platform

EVAL-ADF7021DBJZ

426 MHz to 429 MHz Daughter Board

EVAL-ADF7021DBZ2

860 MHz to 870 MHz Daughter Board

EVAL-ADF7021DBZ3

431 MHz to 470 MHz Daughter Board

EVAL-ADF7021DBZ5

80 MHz to 650 MHz Daughter Board

EVAL-ADF7021DBZ6

608 MHz to 614 MHz Daughter Board

EVAL-ADF7021DB9Z

169 MHz Daughter Board

1 Z = RoHS Compliant Part.

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