LPC1547JBD48 datasheet(73/99 Pages) NXP

tên linh kiện	LPC1547JBD48

Giải thích chi tiết về linh kiện	32-bit ARM Cortex-M3 microcontroller; up to 256 kB flash and 36 kB SRAM

PDF	99 Pages

Scroll/Zoom	100%

nhà sản xuất	NXP [NXP Semiconductors]

Trang chủ	http://www.nxp.com

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LPC15XX

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Product data sheet

Rev. 1 — 19 February 2014

73 of 99

NXP Semiconductors

LPC15xx

32-bit ARM Cortex-M3 microcontroller

12.6 SPI interfaces

The maximum data bit rate is 17 Mbit/s in master mode and in slave mode.

Remark: SPI functions can be assigned to all digital pins. The characteristics are valid for

all digital pins except the open-drain pins PIO0_22 and PIO0_23.

Table 20.

SPI dynamic characteristics

Tamb = 40 C to 105 C; 2.4 V <= VDD <= 3.6 V; CL = 10 pF; input slew = 1 ns. Simulated

parameters sampled at the 50 % level of the rising or falling edge; values guaranteed by design.

Symbol

Parameter

Min

Max

Unit

SPI master

tDS

data set-up time

tDH

data hold time

tv(Q)

data output valid time

th(Q)

data output hold time

SPI slave

tDS

data set-up time

tDH

data hold time

tv(Q)

data output valid time

th(Q)

data output hold time

Tcy(clk) = CCLK/DIVVAL with CCLK = system clock frequency. DIVVAL is the SPI clock divider. See

the LPC15xx User manual UM10736.

Fig 36. SPI master timing

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