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LPC1547JBD48 bảng dữ liệu(PDF) 35 Page - NXP Semiconductors |
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LPC1547JBD48 bảng dữ liệu(HTML) 35 Page - NXP Semiconductors |
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35 / 99 page ![]() LPC15XX All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved. Product data sheet Rev. 1 — 19 February 2014 35 of 99 NXP Semiconductors LPC15xx 32-bit ARM Cortex-M3 microcontroller 8.22.3 SCTimer/PWM in the large configuration (SCT0/1) Remark: For applications that require exact timing of the SCT outputs (for example PWM), assign the outputs only to fixed-pin functions to ensure that the output skew is nearly the same for all outputs. 8.22.3.1 Features The following feature list summarizes the configuration for the two large SCTs. Each large SCT has a companion small SCT (see Section 8.22.4) with fewer inputs and outputs and a reduced feature set. • Each SCT supports: – 16 match/capture registers – 16 events – 16 states – Match register 0 to 5 support a fractional component for the dither engine Fig 13. Subsystem with timers, switch matrix, DMA, and analog components TEMP SENSOR VDDA DIVIDER VOLTAGE REFERENCE ACMP0 ACMP1 ACMP2 ACMP3 TIMER0 (SCT0) TIMER1 (SCT1) TIMER2 (SCT2) TIMER3 (SCT3) ADC0/ADC1 DAC SCT IPU DMA NVIC DAC_SHUTOFF digital signal from/to pins analog signal from/to pins digital signal internal analog signal internal analog peripheral digital peripheral aaa-010874 4 |
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