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LPC1547JBD48 bảng dữ liệu(PDF) 37 Page - NXP Semiconductors |
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LPC1547JBD48 bảng dữ liệu(HTML) 37 Page - NXP Semiconductors |
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37 / 99 page ![]() LPC15XX All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved. Product data sheet Rev. 1 — 19 February 2014 37 of 99 NXP Semiconductors LPC15xx 32-bit ARM Cortex-M3 microcontroller • 10 outputs (some outputs are connected to multiple locations) – Three outputs connected to external pins through the switch matrix as movable functions. – Five outputs connected to external pins through the switch matrix as fixed-pin functions. – Two outputs connected to the SCTIPU to sample or latch input events. – One output connected to the other large SCT – Four outputs connected to one small SCT – Two outputs connected to each ADC trigger input 8.22.4 State-Configurable Timers in the small configuration (SCT2/3) Remark: For applications that require exact timing of the SCT outputs (for example PWM), assign the outputs only to fixed-pin functions to ensure that the output skew is nearly the same for all outputs. 8.22.4.1 Features The following feature list summarizes the configuration for the two small SCTs. Each small SCT has a companion large SCT (see Section 8.22.3) with more inputs and outputs and a dither engine. • Each SCT supports: – 8 match/capture registers – 10 events – 10 states – 3 inputs and 6 outputs – DMA support • Counter/timer features: – Configurable as two 16-bit counters or one 32-bit counter. – Counters clocked by bus clock or selected input. – Up counters or up-down counters. – Configurable number of match and capture registers. Up to 16 match and capture registers total. – Upon match create the following events: interrupt, stop, limit timer or change direction; toggle outputs; change state. – Counter value can be loaded into capture register triggered by match or input/output toggle. • PWM features: – Counters can be used in conjunction with match registers to toggle outputs and create time-proportioned PWM signals. – Up to six single-edge or dual-edge controlled PWM outputs with independent duty cycles if configured as 32-bit timers. • Event creation features: |
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