CS49400 datasheet(54/100 Pages) CIRRUS

54 / 100 page

address of the desired Parallel I/O Register. The

address must be maintained for the duration of

the read cycle.

Host Message: FA[1:0]==00b.

Host Control:

FA[1:0]==01b.

PCMDATA:

FA[1:0]==10b.

CMPDATA:

FA[1:0]==11b.

2) The host indicates that this is a write cycle by

driving the FR/W pin low.

3) The host initiates a write cycle by driving the

FCS and FDS pins low.

4) The host drives the data byte to the FDAT[7:0]

pins of DSPAB.

5) Once the setup time for the write has been met,

the host ends the write cycle by driving the FCS

and FDS pins high.

6.2.6.2 Reading a Byte in Motorola Mode

The flow diagram shown in Figure 39, "Motorola

Mode, One-Byte Read Flow Diagram for DSPAB"

on page 54 illustrates the sequence of events that

define a one-byte read in Motorola mode. The

protocol presented in Figure 39 will now be

described in detail.

1) The host must drive the FA1 and FA0 register

address pins of DSPAB with the address of the

desired Parallel I/O Register. Note that only the

Host Message register and the Host Control

maintained for the duration of the read cycle.

Host Message:

FA[1:0]==00b.

Host Control:

FA[1:0]==01b.

2) The host indicates that this is a read cycle by

driving the FR/W pin high.

3) The host initiates the read cycle by driving the

FCS and FDS pins low (bus must be tri-stated

by this time).

4) Once the data is valid (after waiting the

appropriate time specified in the timing

specifications), the host can read the value of

the selected register from the FDAT[7:0] pins

of DSPAB.

5) The host should now terminate the read cycle

by driving the FCS and FDS pins high.

FCS (HIGH)

FDS (HIGH)

WRITE BYTE TO

FDAT[7:0]

FCS (LOW)

FDS (LOW)

FR/W (LOW)

ADDRESS A PARALLEL I/O REGISTER

(FA[1:0] SET APPROPRIATELY)

Figure 38. Motorola Mode, One-Byte Write Flow Dia-

gram for DSPAB

FCS (HIGH)

FDS (HIGH)

READ BYTE FROM

FDAT[7:0]

FCS (LOW)

FDS (LOW)

FR/W (HIGH)

ADDRESS A PARALLEL I/O REGISTER

(FA[1:0] SET APPROPRIATELY)

Figure 39. Motorola Mode, One-Byte Read Flow Di-

agram for DSPAB

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