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CS49300 bảng dữ liệu(PDF) 54 Page - Cirrus Logic

tên linh kiện CS49300
Giải thích chi tiết về linh kiện  Multi-Standard Audio Decoder Family
PDF  86 Pages
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nhà sản xuất  CIRRUS [Cirrus Logic]
Trang chủ  http://www.cirrus.com
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CS49300 bảng dữ liệu(HTML) 54 Page - Cirrus Logic

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CS49300 Family DSP
54
DS339PP4
Figure 34. Typical Parallel Boot and Download Procedure
Notes: 1. RESET must be held LOW for
trstl.
2. It should be noted that mode
pins are used to configure the
CS493XX serial communication
mode. These mode pins are
latched internally on the rising
edge of reset. The pins can be
set dynamically by a
microprocessor or can be
statically pulled HIGH or LOW. If
these pins are driven
dynamically, setup and hold
times must be satisfied as stated
in the
CS493XX Data Sheet.
More information about the
function of the mode pins can be
found in the CS493XX Data
Sheet and in Section 6, “Control”
on page 32.
3. Time-out values reflect worst
case response time for the
CS493XX. The values shown
may be used for the host’s time-
out control loop.
4. 5 ms is typical but this time is
application code specific and
may be as high as 10 ms. Wait
times should be verified by the
designer.
5. Hardware configuration
messages are covered in
Section 6, “Control” on page 32.
Application configuration
messages are covered in each
application code user’s manual.
HOUTRDY LOW?
N
Y
WRITE_*(DOWNLOAD_
RESET(LOW) (NOTE 1)
RESET(HIGH) (NOTE 2)
WAIT
500
µs
BOOT, MSG_SIZE)
TIMEOUT AFTER
20MS (NOTE 3)
READ_*(MESSAGE)
MESSAGE ==
N
Y
BOOTSTART?
WRITE_*(.LD FILE,
TIMEOUT AFTER
20MS (NOTE 3)
DOWNLOAD FILE SIZE)
READ_*(MESSAGE)
MESSAGE ==
N
Y
EXIT(ERROR)
BOOT_SUCCESS?
WRITE_*(BOOT_
SUCCESS_RECEIVED,
MSG-SIZE)
WAIT 5 MS (NOTE 4)
DOWNLOAD COMPLETE
WRITE_*(SW_CONFIG_MSG,
SW_MSG_SIZE)
(NOTE 5)
WRITE_*(KICKSTART,
MSG_SIZE)
(NOTE 5)
WRITE_*(HW_CONFIG_MSG,
HW_MSG_SIZE)
(NOTE 5)
EXIT(ERROR)
READ HOSTCTL
REGISTER
HOUTRDY LOW?
N
Y
READ HOSTCTL
REGISTER



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