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LM98714CCMT/NOPB bảng dữ liệu(PDF) 1 Page - Texas Instruments |
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LM98714CCMT/NOPB bảng dữ liệu(HTML) 1 Page - Texas Instruments |
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1 / 114 page ![]() LM98714 CCD Timing Generator Analog Front End CCD/CIS Sensor Sensor Drivers Image Processor/ASIC Data Output SPI Motor Controllers LM98714 www.ti.com SNAS254A – OCTOBER 2006 – REVISED JANUARY 2014 LM98714 Three Channel, 16-Bit, 45 MSPS Analog Front End with LVDS/CMOS Output and Integrated CCD/CIS Sensor Timing Generator Check for Samples: LM98714 1 FEATURES DESCRIPTION The LM98714 is a fully integrated, high performance 2 • LVDS/CMOS Outputs 16-Bit, 45 MSPS signal processing solution for digital • LVDS/CMOS Pixel Rate Input Clock or ADC color copiers, scanners, and other image processing Input Clock applications. High-speed signal throughput is • CDS or S/H Processing for CCD or CIS achieved with an innovative architecture utilizing Correlated Double Sampling (CDS), typically Sensors employed with CCD arrays, or Sample and Hold • Independent Gain/Offset Correction for Each (S/H) inputs (for Contact Image Sensors and CMOS Channel image sensors). The signal paths utilize 8 bit • Digital Black Level Correction Loop for Each Programmable Gain Amplifiers (PGA), a ±9-Bit offset Channel correction DAC and independently controlled Digital Black Level correction loops for each input. The PGA • Programmable Input Clamp Voltage and offset DAC are programmed independently • Flexible CCD/CIS Sensor Timing Generator allowing unique values of gain and offset for each of the three inputs. The signals are then routed to a APPLICATIONS 45MHz high performance analog-to-digital converter (ADC). The fully differential processing channel • Multi-Function Peripherals shows exceptional noise immunity, having a very low • Facsimile Equipment noise floor of –74dB. The 16-bit ADC has excellent • Flatbed or Handheld Color Scanners dynamic performance making the LM98714 transparent in the image reproduction chain. • High-Speed Document Scanner KEY SPECIFICATIONS • Maximum Input Level: 1.2 or 2.4 Volt Modes – (Both with + or - Polarity Option) • ADC Resolution: 16-Bit • ADC Sampling Rate: 45 MSPS • INL: ±23 LSB (Typ) Figure 1. System Block Diagram • Channel Sampling Rate: 15/22.5/30 MSPS • PGA Gain Steps: 256 Steps • PGA Gain Range: 0.7 to 7.84x • Analog DAC Resolution: ±9 Bits • Analog DAC Range: ±300mV or ±600mV • Digital DAC Resolution: ±6 Bits • Digital DAC Range: -1024 LSB to + 1008 LSB • SNR: -74dB (@ 0 dB PGA Gain) • Power Dissipation: 505 mW (LVDS) 610 mW (CMOS) • Operating Temp: 0 to 70°C • Supply Voltage: 3.3 V Nominal (3.0 V to 3.6 V Range) 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright © 2006–2014, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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