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TAS5342DDVRG4 bảng dữ liệu(PDF) 11 Page - Texas Instruments

tên linh kiện TAS5342DDVRG4
Giải thích chi tiết về linh kiện  100 W STEREO DIGITAL AMPLIFIER POWER STAGE
PDF  29 Pages
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Trang chủ  http://www.ti.com
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TAS5342DDVRG4 bảng dữ liệu(HTML) 11 Page - Texas Instruments

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TYPICAL CHARACTERISTICS, BTL CONFIGURATION
8 Ω
6 Ω
4 Ω
T =75°C
THD+Nat10%
C
PVDD – SupplyVoltage – V
0
130
5
10
15
20
25
30
35
40
45
50
55
60
65
70
75
80
85
90
95
100
105
110
115
120
125
0
30
2
4
6
8
10
12
14
16
18
20
22
24
26
28
0.005
10
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
P – OutputPower – W
O
8 Ω
4 Ω
6 Ω
200
20
50 100 200
500 1
100
50
2
10 20
5
T =75°C
THD+Nat10%
C
TAS5342
SLAS557B–SEPTEMBER 2007–REVISED OCTOBER 2007
ELECTRICAL CHARACTERISTICS (continued)
PVDD_x = 31.5 V, GVDD_X = 12 V, VDD = 12 V, TC (Case temperature) = 25°C, fS = 384 kHz, unless otherwise specified.
TAS5342
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
Connected when RESET is active to provide
Output pulldown current of each
IPD
bootstrap capacitor charge. Not used in SE
3
mA
half-bridge
mode.
Static Digital Specifications
VIH
High-level input voltage
2
V
PWM_A, PWM_B, PWM_C, PWM_D, M1,
M2, M3, RESET_AB, RESET_CD
VIL
Low-level input voltage
0.8
V
ILeakage
Input leakage current
100
μ
A
OTW/SHUTDOWN (SD)
Internal pullup resistance, OTW to
RINT_PU
20
26
32
kΩ
VREG, SD to VREG
Internal pullup resistor
3
3.3
3.6
VOH
High-level output voltage
V
External pullup of 4.7 kΩ to 5 V
4.5
5
VOL
Low-level output voltage
IO = 4 mA
0.2
0.4
V
FANOUT
Device fanout OTW, SD
No external pullup
30
Devices
TOTAL HARMONIC DISTORTION + NOISE
OUTPUT POWER
vs
vs
OUTPUT POWER
SUPPLY VOLTAGE
Figure 1.
Figure 2.
Copyright © 2007, Texas Instruments Incorporated
Submit Documentation Feedback
11
Product Folder Link(s): TAS5342
Not Recommended for New Designs



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