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STM8S005C6T6C bảng dữ liệu(PDF) 86 Page - STMicroelectronics |
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STM8S005C6T6C bảng dữ liệu(HTML) 86 Page - STMicroelectronics |
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86 / 103 page ![]() 10-bit ADC characteristics 9.3.11 Subject to general operating conditions for VDDA, fMASTER, and TA unless otherwise specified. Table 43: ADC characteristics Unit Max Typ Min Conditions Parameter Symbol MHz 4.0 1.0 VDDA =2.95 to 5.5 V ADC clock frequency fADC 6.0 1.0 VDDA =4.5 to 5.5 V V 5.5 3.0 Analog supply VDDA V VDDA 2.75 (1) Positive reference voltage VREF+ V 0.5 (1) V SSA Negative reference voltage VREF- V V DDA V SSA Conversion voltage range (2) VAIN V VREF+ VREF- Devices with external VREF+/VREF- pins pF 3.0 Internal sample and hold capacitor CADC µs 0.75 fADC = 4 MHz Sampling time tS (2) 0.5 fADC = 6 MHz µs 7.0 Wakeup time from standby tSTAB µs 3.5 fADC = 4 MHz Total conversion time (including sampling time, 10-bit resolution) tCONV µs 2.33 fADC = 6 MHz 1/fADC 14 (1) Data guaranteed by design, not tested in production.. (2) During the sample time the input capacitance C AIN (3 pF max) can be charged/discharged by the external source. The internal resistance of the analog source must allow the capacitance to reach its final voltage level within tS. After the end of the sample time tS, DocID022186 Rev 3 86/103 STM8S005K6 STM8S005C6 Electrical characteristics |
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