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STM8S005C6T6C bảng dữ liệu(PDF) 62 Page - STMicroelectronics |
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STM8S005C6T6C bảng dữ liệu(HTML) 62 Page - STMicroelectronics |
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62 / 103 page ![]() Unit Max (1) Typ Conditions Parameter Symbol 2 (6) 1 (6) HSI (after Flash in operating mode (5) MVR voltage regulator on (4) Wakeup time active halt mode to run mode (3) tWU(AH) wakeup) 3 (6) HSI (after Flash in power-down MVR voltage regulator Wakeup time active halt mode to run wakeup) mode (5) on (4) mode (3) 48 (6) HSI (after Flash in operating mode (5) MVR voltage regulator off (4) Wakeup time active halt mode to run mode (3) wakeup) 50 (6) HSI (after Flash in power-down MVR voltage regulator Wakeup time active halt mode to run wakeup) mode (5) off (4) mode (3) 52 Flash in operating mode (5) Wakeup time from halt mode to run tWU(H) 54 Flash in power-down mode (5) mode (3) (1) Data guaranteed by design, not tested in production. (2) t WU(WFI) = 2 x 1/fmaster + x 1/fCPU. (3) Measured from interrupt event to interrupt vector fetch. (4) Configured by the REGAH bit in the CLK_ICKR register. (5) Configured by the AHALT bit in the FLASH_CR1 register. (6) Plus 1 LSI clock depending on synchronization. Total current consumption and timing in forced reset state 9.3.2.6 Table 28: Total current consumption and timing in forced reset state Unit Max (1) Typ Conditions Parameter Symbol μA 500 VDD = 5 V Supply current in reset state (2) IDD(R) 400 VDD = 3.3 V DocID022186 Rev 3 62/103 STM8S005K6 STM8S005C6 Electrical characteristics |
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