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Giải thích chi tiết về linh kiện  1.8V 8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI
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7.2.7
Write Disable (04h)
The Write Disable instruction (Figure 6) resets the Write Enable Latch (WEL) bit in the Status Register to
a 0. The Write Disable instruction is entered by driving /CS low, shifting the instructio
n code “04h” into the
DI pin and then driving /CS high. Note that the WEL bit is automatically reset after Power-up and upon
completion of the Write Status Register, Erase/Program Security Registers, Page Program, Quad Page
Program, Sector Erase, Block Erase and Chip Erase instructions.
Write Disable instruction can also be used to invalidate the Write Enable for Volatile Status Register
instruction.
/CS
CLK
DI
(IO
0)
DO
(IO
1)
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Mode 0
Mode 3
Instruction (04h)
High Impedance
Figure 6. Write Disable Instruction Sequence Diagram



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