PIC24HJ128GP310 datasheet(151/286 Pages) MICROCHIP

151 / 286 page

DS70175F-page 149

PIC24HJXXXGPX06/X08/X10

SPIxSTAT: SPIx STATUS AND CONTROL REGISTER

R/W-0

U-0

R/W-0

U-0

SPIEN

—

SPISIDL

—

bit 15

bit 8

U-0

R/C-0

U-0

R-0

—

SPIROV

—

SPITBF

SPIRBF

bit 7

bit 0

Legend:

C = Clearable bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

SPIEN: SPIx Enable bit

1 = Enables module and configures SCKx, SDOx, SDIx and SSx as serial port pins

0 = Disables module

bit 14

Unimplemented: Read as ‘0’

bit 13

SPISIDL: Stop in Idle Mode bit

1 = Discontinue module operation when device enters Idle mode

0 = Continue module operation in Idle mode

bit 12-7

Unimplemented: Read as ‘0’

bit 6

SPIROV: Receive Overflow Flag bit

1 = A new byte/word is completely received and discarded. The user software has not read the

previous data in the SPIxBUF register.

0 = No overflow has occurred

bit 5-2

Unimplemented: Read as ‘0’

bit 1

SPITBF: SPIx Transmit Buffer Full Status bit

1 = Transmit not yet started, SPIxTXB is full

0 = Transmit started, SPIxTXB is empty

Automatically set in hardware when CPU writes SPIxBUF location, loading SPIxTXB.

Automatically cleared in hardware when SPIx module transfers data from SPIxTXB to SPIxSR.

bit 0

SPIRBF: SPIx Receive Buffer Full Status bit

1 = Receive complete, SPIxRXB is full

0 = Receive is not complete, SPIxRXB is empty

Automatically set in hardware when SPIx transfers data from SPIxSR to SPIxRXB.

Automatically cleared in hardware when core reads SPIxBUF location, reading SPIxRXB.

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