PIC24HJ128GP310 datasheet(148/286 Pages) MICROCHIP

148 / 286 page

PIC24HJXXXGPX06/X08/X10

DS70175F-page 146

To set up the SPI module for the Slave mode of operation:

Clear the SPIxBUF register.

If using interrupts:

Clear the SPIxIF bit in the respective IFSn

Set the SPIxIE bit in the respective IECn

Write the SPIxIP bits in the respective IPCn

Write the desired settings to the SPIxCON1 and

SPIxCON2

registers

with

MSTEN

(SPIxCON1<5>) = 0.

Clear the SMP bit.

If the CKE bit is set, then the SSEN bit

(SPIxCON1<7>) must be set to enable the SSx

pin.

Clear the SPIROV bit (SPIxSTAT<6>).

Enable SPI operation by setting the SPIEN bit

(SPIxSTAT<15>).

The SPI module generates an interrupt indicating com-

pletion of a byte or word transfer, as well as a separate

interrupt for all SPI error conditions.

FIGURE 15-1:

SPI MODULE BLOCK DIAGRAM

Note:

Both SPI1 and SPI2 can trigger a DMA

data transfer. If SPI1 or SPI2 is selected

as the DMA IRQ source, a DMA transfer

occurs when the SPI1IF or SPI2IF bit gets

set as a result of an SPI1 or SPI2 byte or

word transfer.

Internal Data Bus

SDIx

SDOx

SSx

SCKx

SPIxSR

bit 0

Shift Control

Edge

Select

FCY

Primary

1:1/4/16/64

Enable

Prescaler

Sync

SPIxBUF

Control

Transfer

Write SPIxBUF

Read SPIxBUF

SPIxCON1<1:0>

SPIxCON1<4:2>

Master Clock

Clock

Control

Secondary

Prescaler

1:1 to 1:8

SPIxRXB

SPIxTXB

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