PIC10LF322T-EMCSQTP datasheet(147/210 Pages) MICROCHIP

147 / 210 page

 2011 Microchip Technology Inc.

Preliminary

DS41585A-page 147

PIC10(L)F320/322

21.11 Configuring the CWG

The following steps illustrate how to properly configure

the CWG to ensure a synchronous start:

Ensure that the TRIS control bits corresponding

to CWGxA and CWGxB are set so that both are

configured as inputs.

Clear the GxEN bit, if not already cleared.

Set desired dead-band times with the CWGxDBR

and CWGxDBF registers.

Setup the following controls in CWGxCON2

auto-shutdown register:

• Select desired shutdown source.

• Select both output overrides to the desired

levels (this is necessary even if not using

auto-shutdown because start-up will be from

a shutdown state).

• Set the GxASE bit and clear the GxARSEN

bit.

Select the desired input source using the

CWGxCON1 register.

Configure the following controls in CWGxCON0

• Select desired clock source.

• Select the desired output polarities.

• Set the output enables for the outputs to be

used.

Set the GxEN bit.

Clear TRIS control bits corresponding to

CWGxA and CWGxB to be used to configure

those pins as outputs.

If auto-restart is to be used, set the GxARSEN

bit and the GxASE bit will be cleared automati-

cally. Otherwise, clear the GxASE bit to start the

CWG.

21.11.1

PIN OVERRIDE LEVELS

The levels driven to the output pins, while the shutdown

input is true, are controlled by the GxASDLA and

GxASDLB

bits

the

CWGxCON2

(Register 21-3). GxASDLA controls the CWG1A

override level and GxASDLB controls the CWG1B

override level. The control bit logic level corresponds to

the output logic drive level while in the shutdown state.

The polarity control does not apply to the override level.

21.11.2

AUTO-SHUTDOWN RESTART

After an auto-shutdown event has occurred, there are

two ways to have resume operation:

• Software controlled

• Auto-restart

The restart method is selected with the GxARSEN bit

of the CWGxCON2 register. Waveforms of software

controlled and automatic restarts are shown in

Figure 21-5 and Figure 21-6.

21.11.2.1

Software controlled restart

When the GxARSEN bit of the CWGxCON2 register is

cleared, the CWG must be restarted after an auto-shut-

down event by software.

The CWG will resume operation on the first rising edge

event after the GxASE bit is cleared. Clearing the shut-

down state requires all selected shutdown inputs to be

low, otherwise the GxASE bit will remain set.

21.11.2.2

Auto-Restart

When the GxARSEN bit of the CWGxCON2 register is

set, the CWG will restart from the auto-shutdown state

automatically.

After the shutdown event clears, the GxASE bit will

clear automatically and the CWG will resume operation

on the first rising edge event.

PIC10LF322T-EMCSQTP bảng dữ liệu(PDF) 147 Page - Microchip Technology

PIC10LF322T-EMCSQTP bảng dữ liệu(HTML) 147 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL