PIC10LF322T-EMCSQTP datasheet(14/210 Pages) MICROCHIP

14 / 210 page

PIC10(L)F320/322

DS41585A-page 14

Preliminary

 2011 Microchip Technology Inc.

2.2.2.1

STATUS Register

The STATUS register, shown in Register 2-1, contains:

• the arithmetic status of the ALU

• the Reset status

• the bank select bits for data memory (SRAM)

The STATUS register can be the destination for any

instruction, like any other register. If the STATUS

the Z, DC or C bits, then the write to these three bits is

disabled. These bits are set or cleared according to the

device logic. Furthermore, the TO and PD bits are not

writable. Therefore, the result of an instruction with the

STATUS register as destination may be different than

intended.

For example, CLRF STATUS will clear the upper three

bits and set the Z bit. This leaves the STATUS register

as ‘000u u1uu’ (where u = unchanged).

It is recommended, therefore, that only BCF, BSF,

SWAPF

and MOVWF instructions are used to alter the

STATUS register, because these instructions do not

affect any Status bits. For other instructions not affect-

ing any Status bits (see Section 23.0 “Instruction Set

Summary”

Note 1:

Bits IRP and RP1 of the STATUS register

are not used by the PIC10(L)F320 and

should be maintained as clear. Use of

these bits is not recommended, since this

may affect upward compatibility with

future products.

The C and DC bits operate as a Borrow

and Digit Borrow out bit, respectively, in

subtraction.

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