ADS5520IPAPR datasheet(9/38 Pages) TI1

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SERIAL PROGRAMMING INTERFACE CHARACTERISTICS

ADDRESS

SDATA

MSB

DATA

D11

D10

16 x M

MSB

LSB

MSB

SCLK

SEN

SDATA

tSLOADS

tSLOADH

tSCLK

tWSCLK

tsu(D)

th(D)

ADS5520

www.ti.com....................................................................................................................................................... SBAS310F – MAY 2004 – REVISED OCTOBER 2008

The ADS5520 has a three-wire serial interface. The ADS5520 latches serial data SDATA on the falling edge of

serial clock SCLK when SEN is active.

• Serial shift of bits is enabled when SEN is low. SCLK shifts serial data at the falling edge.

• Minimum width of data stream for a valid loading is 16 clocks.

• Data is loaded at every 16th SCLK falling edge while SEN is low.

• In case the word length exceeds a multiple of 16 bits, the excess bits are ignored.

• Data can be loaded in multiples of 16-bit words within a single active SEN pulse.

• The first 4-bit nibble is the address of the register while the last 12 bits are the register contents.

Figure 3. DATA Communication is 2-Byte, MSB First

Figure 4. Serial Programming Interface Timing Diagram

Table 2. Serial Programming Interface Timing Characteristics

SYMBOL

PARAMETER

MIN(1)

TYP(1)

MAX(1)

UNIT

tSCLK

SCLK period

tWSCLK

SCLK duty cycle

25%

50%

75%

tSLOADS

SEN to SCLK setup time

tSLOADH

SCLK to SEN hold time

tDS

Data setup time

tDH

Data hold time

(1)

Typ, min, and max values are characterized, but not production tested.

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