LSM6DB0TR datasheet(35/66 Pages) STMICROELECTRONICS

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LSM6DB0

Microprocessor functionality

8.9

Communication interfaces

8.10

I²C bus

The LSM6DB0 provides two I²C interfaces which can operate in master and slave modes.

They can support standard mode and fast mode.

8.11

Universal asynchronous receiver transmitter (UART)

The UART interface (IO0, IO1, IO2, IO3 pins) of the LSM6DB0 supports the following

maximum baud rates:

– 921600 bps in UART mode

– 460800 bps in Infrared data association (IrDA) mode

– 115200 bps in low-power IrDA mode

The interface supports the IrDA serial infrared (SIR) ENDEC and also provides flow control

capabilities through the hardware management of the clear-to-send (CTS) and request-to-

send (RTS) signals.

For more details, refer to the ARM document “DDIO83G_uart_pl011_trm.pdf”.

8.12

Serial peripheral interface (SPI)

The SPI interface operates as a master or slave interface. This interface supports 6 MHz bit

rate max in slave mode and 16 MHz bit rate max in master mode due to the limitation of the

IOs. A programmable clock prescaler inside the SPI allows the input clock to be divided by a

factor of 2 to 254 in steps of two to provide the serial output clock. The SPI interface

provides data frames between 4 and 16 bits long.

For more details, refer to the ARM document “DDIO94C_ssp_PL022_trm.pdf”.

LSM6DB0TR bảng dữ liệu(PDF) 35 Page - STMicroelectronics