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PCF8536AT bảng dữ liệu(PDF) 21 Page - NXP Semiconductors |
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PCF8536AT bảng dữ liệu(HTML) 21 Page - NXP Semiconductors |
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21 / 74 page ![]() PCF8536 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 21 February 2012 21 of 74 NXP Semiconductors PCF8536 Universal LCD low multiplex driver with 6 channel PWM generator 8.1.15 Command: write-PWM-data This command will initiate the transfer of data to the PWM registers. Data will be written into the address defined by the load-data-pointer-PWM command. PWM register filling is described in Section 8.10 [1] For this command to be effective bit RS[1:0] of the control byte has to be set logic 10, see Table 36 on page 46. [2] Default value. After Power-On Reset (POR) the PWM content is set to 0. 8.2 Start-up and shut-down 8.2.1 Reset and Power-On Reset (POR) After a reset and at power-on the PCF8536 resets to starting conditions as follows: 1. The display is disabled. 2. All backplane outputs are set to VSS. 3. All segment outputs are set to VSS. 4. All GPO outputs are disabled. 5. Selected drive mode is: 1:8 with 1⁄4 bias. 6. The data pointers are cleared (set logic 0). 7. PWM values are all reset to zero. 8. RAM data is not initialized. Its content can be considered to be random. 9. The internal oscillator is running; no clock signal is available on pin OSCCLK; pin OSCCLK is in 3-state. The reset state is as shown in Table 29. Table 28. Write-PWM-data - write PWM data command bit description[1] Bit Symbol Value Description 7 - 0 fixed value 6 to 0 P[6:0] 0000000[2] to 1111111 writing data byte-wise to PWM registers |
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