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LNBH26 bảng dữ liệu(PDF) 29 Page - STMicroelectronics

tên linh kiện LNBH26
Giải thích chi tiết về linh kiện  Dual LNBS supply and control IC with step-up and I짼C interface
PDF  38 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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LNBH26 bảng dữ liệu(HTML) 29 Page - STMicroelectronics

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LNBH26
Electrical characteristics
Doc ID 022771 Rev 1
29/38
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
FTONE
Tone frequency
DSQIN=High, EXTM=0, TEN=1
20
22
24
kHz
DTONE
Tone duty cycle
43
50
57
%
tr, tf
Tone rise or fall time (2)
5
8
15
µs
EffDC/DC DC-DC converter efficiency
IOUT = 500 mA
93
%
FSW
DC-DC converter switching
frequency
440
kHz
UVLO
Undervoltage lockout thresholds
UVLO threshold rising
4.8
V
UVLO threshold falling
4.7
VLP
Low power diagnostic (LPD)
thresholds
VLP threshold rising
7.2
V
VLP threshold falling
6.7
VIL
DSQIN, pin logic low
0.8
V
VIH
DSQIN, pin logic high
2
V
IIH
DSQIN, pin input current
VIH = 5 V
15
µA
FDETIN
Tone detector frequency capture
range
0.4 VPP sine wave
(3)
19
22
25
kHz
VDETIN
Tone detector input amplitude
Sine wave signal, 22 kHz
0.3
1.5
VPP
ZDETIN
Tone detector input impedance
150
k
Ω
VOL
DSQOUT, FLT pins logic LOW
DETIN tone present, IOL = 2 mA
0.3
0.5
V
VOL_BPS
W
BPSW pin low voltage
IOL_BPSW = 5 mA
DSQIN = high, EXTM = 0, TEN = 1
0.7
V
IOZ
DSQOUT, FLT pins leakage
current
DETIN tone absent, VOH = 6 V
10
µA
IOBK
Output backward current
All VSELx = 0, VOBK = 30 V
-3
-6
mA
ISINK
Output low-side sink current
VOUT forced at VOUT_nom+0.1 V
70
mA
ISINK_TIM
E-OUT
Low-side sink current time-out
VOUT forced at VOUT_nom+0.1 V.
PDO I²C bit is set to 1 after this time is
elapsed.
10
ms
IREV
Max. reverse current
VOUT forced at VOUT_nom+0.1 V,
after PDO bit is set to 1 (ISINK_TIME-
OUT elapsed).
2mA
TSHDN
Thermal shutdown threshold
150
°C
ΔTSHDN Thermal shutdown hysteresis
15
°C
1.
In applications where (VCC - VOUT) > 1.3 V, the increased power dissipation inside the integrated LDO must be taken into
account in the application thermal management design.
2.
Guaranteed by design.
3.
Frequency range in which the DETIN function is guaranteed. The Vpp level is intended on the LNB bus (before the C6
capacitor. See typical application circuit for DiSEqC 2.x) IOUT from 0 to 750 mA, CBUS from 0 to 750 nF.
Table 13.
Electrical characteristics of section A/B (continued)



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