TMS320DM6467CCUT datasheet(55/355 Pages) TI

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TMS320DM6467

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SPRS403H – DECEMBER 2007 – REVISED JUNE 2012

Table 3-17. Transport Stream Interface 0 (TSIF0) Terminal Functions (continued)

SIGNAL

TYPE(1)

OTHER(2) (3)

DESCRIPTION

NAME

NO.

TSIF0 PARALLEL OUTPUT (PINMUX0.PTSIMUX = 10)

This pin is multiplexed between the VPIF and TSIF0.

VP_CLKO3/

AC10

O/Z

When TSIF0 output is enabled (PINMUX0.PTSOMUX = 1x), this pin is the

TS0_CLKO

DVDD33

transmit clock output, TS0_CLKO (O/Z).

This pin is multiplexed between UART0, TSIF0, and GPIO.

UDTR0/

IPU

When TSIF0 output is enabled (PINMUX0.PTSOMUX = 1x), this pin is the

Y12

I/O/Z

TS0_ENAO/GP[36]

DVDD33

data enable indicator, TS0_ENAO (O/Z) in either synchronous/asynchronous

modes.

This pin is multiplexed between UART0, TSIF0, and GPIO.

UDSR0/

IPU

When TSIF0 output is enabled (PINMUX0.PTSOMUX = 1x), this pin is the

TS0_PSTO/

AB11

I/O/Z

DVDD33

packet start output indicator, TS0_PSTO (O/Z) in either

GP[37]

synchronous/asynchronous modes.

This pin is multiplexed between UART0, TSIF0, and GPIO.

UDCD0/

IPU

When TSIF0 output is enabled (PINMUX0.PTSOMUX = 1x), in asynchronous

TS0_WAITIN/

AA11

I/O/Z

DVDD33

mode, this pin is the wait input, TS0_WAITIN (I).

GP[38]

This TSIF pin function is not used in synchronous mode.

VP_DIN7/

TS0_DOUT7/

Y14

TS1_DIN

VP_DIN6/

These pins are multiplexed between the VPIF, TSIF0, and TSIF1.

TS0_DOUT6/

AA14

When parallel TSIF0 output is enabled (PINMUX0.PTSOMUX = 10), and

TS1_PSTIN

IPD

I/O/Z

TSIF1 VPIF_DIN muxing is not enabled (TSSI_MUX

≠ 11), these pins are

DVDD33

VP_DIN5/

the output data bits TS0_DOUT[7:4] (O/Z) in either

TS0_DOUT5/

AB14

synchronous/asynchronous modes.

TS1_EN_WAITO

VP_DIN4/

TS0_DOUT4/

AC14

TS1_WAITO

VP_DIN3/

Y15

TS0_DOUT3

VP_DIN2/

These pins are multiplexed between the VPIF and TSIF0.

AA15

TS0_DOUT2

IPD

When parallel TSIF0 output is enabled (PINMUX0.PTSOMUX = 10), these

I/O/Z

DVDD33

pins are the output data bits TS0_DOUT[3:0] (O/Z) in either

VP_DIN1/

AB15

synchronous/asynchronous modes.

TS0_DOUT1

VP_DIN0/

AC15

TS0_DOUT0

TSIF0 SERIAL OUTPUT (PINMUX0.PTSIMUX = 11)

This pin is multiplexed between the VPIF and TSIF0.

VP_CLKO3/

AC10

O/Z

When TSIF0 output is enabled (PINMUX0.PTSOMUX = 1x), this pin is the

TS0_CLKO

DVDD33

transmit clock output, TS0_CLKO (O/Z).

This pin is multiplexed between UART0, TSIF0, and GPIO.

UDTR0/

IPU

When TSIF0 output is enabled (PINMUX0.PTSOMUX = 1x), this pin is the

Y12

I/O/Z

TS0_ENAO/GP[36]

DVDD33

data enable indicator, TS0_ENAO (O/Z) in either synchronous/asynchronous

modes.

This pin is multiplexed between UART0, TSIF0, and GPIO.

UDSR0/

IPU

When TSIF0 output is enabled (PINMUX0.PTSOMUX = 1x), this pin is the

AB11

I/O/Z

TS0_PSTO/GP[37]

DVDD33

packet start output indicator, TS0_PSTO (O/Z) in either

synchronous/asynchronous modes.

This pin is multiplexed between UART0, TSIF0, and GPIO.

UDCD0/

IPU

When TSIF0 output is enabled (PINMUX0.PTSOMUX = 1x), in asynchronous

AA11

I/O/Z

TS0_WAITIN/GP[38]

DVDD33

mode, this pin is the wait input, TS0_WAITIN (I).

This TSIF pin function is not used in synchronous mode.

This pin is multiplexed between UART1, TSIF0, and GPIO.

UTXD1/URCTX1/

IPD

When serial TSIF0 output is enabled (PINMUX0.PTSOMUX = 11), in

AB19

I/O/Z

TS0_DOUT7/GP[24]

DVDD33

synchronous/asynchronous modes, this pin is the serial output data bit,

TS0_DOUT[7] (O/Z).

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