DOC7707 datasheet(207/307 Pages) ETC1

tên linh kiện	DOC7707

Giải thích chi tiết về linh kiện	Microcontroller with 8/16K Bytes of ISP Flash and USB Controller

PDF	307 Pages

Scroll/Zoom	100%

nhà sản xuất	ETC1 [List of Unclassifed Manufacturers]

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207

7707F–AVR–11/10

AT90USB82/162

It is not possible to have overflow error during IN stage, in the CPU side, since the CPU should

write only if the bank is ready to access data (TXINI=1 or RWAL=1).

20.17 Interrupts

The next figure shows all the interrupts sources:

Figure 20-4. USB Device Controller Interrupt System

There are 2 kind of interrupts: processing (i.e. their generation are part of the normal processing)

and exception (errors).

Processing interrupts are generated when:

• Upstream resume(UPRSMI)

• End of resume(EORSMI)

• Wake up(WAKEUPI)

• End of reset (Speed Initialization)(EORSTI)

• Start of frame(SOFI, if FNCERR=0)

• Suspend detected after 3 ms of inactivity(SUSPI)

Exception Interrupts are generated when:

• CRC error in frame number of SOF(SOFI, FNCERR=1)

UPRSMI

UDINT.6

UPRSME

UDIEN.6

EORSMI

UDINT.5

EORSME

UDIEN.5

WAKEUPI

UDINT.4

WAKEUPE

UDIEN.4

EORSTI

UDINT.3

EORSTE

UDIEN.3

SOFI

UDINT.2

SOFE

UDIEN.2

SUSPI

UDINT.0

SUSPE

UDIEN.0

USB Device

Interrupt

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